]> git.sur5r.net Git - u-boot/blobdiff - drivers/net/davinci_emac.c
sf: add paired dev info for winbond w25q16jv
[u-boot] / drivers / net / davinci_emac.c
index 187137c8b477692dec2970047d2585e93885fb78..bb879d8d4fef1a398a806e7b5486ecebab81dd79 100644 (file)
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Ethernet driver for TI TMS320DM644x (DaVinci) chips.
  *
@@ -16,8 +17,6 @@
  *
  * ----------------------------------------------------------------------------
  *
- * SPDX-License-Identifier:    GPL-2.0+
- *
  * Modifications:
  * ver. 1.0: Sep 2005, Anant Gole - Created EMAC version for uBoot.
  * ver  1.1: Nov 2005, Anant Gole - Extended the RX logic for multiple descriptors
@@ -223,10 +222,10 @@ int davinci_eth_phy_read(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t *data)
 
        if (tmp & MDIO_USERACCESS0_ACK) {
                *data = tmp & 0xffff;
-               return 0;
+               return 1;
        }
 
-       return -EIO;
+       return 0;
 }
 
 /* Write to a PHY register via MDIO inteface. Blocks until operation is complete. */
@@ -247,7 +246,7 @@ int davinci_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data)
        while (readl(&adap_mdio->USERACCESS0) & MDIO_USERACCESS0_GO)
                ;
 
-       return 0;
+       return 1;
 }
 
 /* PHY functions for a generic PHY */
@@ -341,6 +340,14 @@ static int gen_auto_negotiate(int phy_addr)
        if (!davinci_eth_phy_read(phy_addr, MII_BMCR, &tmp))
                return(0);
 
+#ifdef DAVINCI_EMAC_GIG_ENABLE
+       davinci_eth_phy_read(phy_addr, MII_CTRL1000, &val);
+       val |= PHY_1000BTCR_1000FD;
+       val &= ~PHY_1000BTCR_1000HD;
+       davinci_eth_phy_write(phy_addr, MII_CTRL1000, val);
+       davinci_eth_phy_read(phy_addr, MII_CTRL1000, &val);
+#endif
+
        /* Restart Auto_negotiation  */
        tmp |= BMCR_ANRESTART;
        davinci_eth_phy_write(phy_addr, MII_BMCR, tmp);
@@ -374,15 +381,14 @@ static int davinci_mii_phy_read(struct mii_dev *bus, int addr, int devad,
 {
        unsigned short value = 0;
        int retval = davinci_eth_phy_read(addr, reg, &value);
-       if (retval < 0)
-               return retval;
-       return value;
+
+       return retval ? value : -EIO;
 }
 
 static int davinci_mii_phy_write(struct mii_dev *bus, int addr, int devad,
                                 int reg, u16 value)
 {
-       return davinci_eth_phy_write(addr, reg, value);
+       return davinci_eth_phy_write(addr, reg, value) ? 0 : 1;
 }
 #endif
 
@@ -408,7 +414,8 @@ static void  __attribute__((unused)) davinci_eth_gigabit_enable(int phy_addr)
 static int davinci_eth_open(struct eth_device *dev, bd_t *bis)
 {
        dv_reg_p                addr;
-       u_int32_t               clkdiv, cnt;
+       u_int32_t               clkdiv, cnt, mac_control;
+       uint16_t                __maybe_unused lpa_val;
        volatile emac_desc      *rx_desc;
        int                     index;
 
@@ -489,19 +496,6 @@ static int davinci_eth_open(struct eth_device *dev, bd_t *bis)
        /* Enable ch 0 only */
        writel(1, &adap_emac->RXUNICASTSET);
 
-       /* Enable MII interface and Full duplex mode */
-#if defined(CONFIG_SOC_DA8XX) || \
-       (defined(CONFIG_OMAP34XX) && defined(CONFIG_DRIVER_TI_EMAC_USE_RMII))
-       writel((EMAC_MACCONTROL_MIIEN_ENABLE |
-               EMAC_MACCONTROL_FULLDUPLEX_ENABLE |
-               EMAC_MACCONTROL_RMIISPEED_100),
-              &adap_emac->MACCONTROL);
-#else
-       writel((EMAC_MACCONTROL_MIIEN_ENABLE |
-               EMAC_MACCONTROL_FULLDUPLEX_ENABLE),
-              &adap_emac->MACCONTROL);
-#endif
-
        /* Init MDIO & get link state */
        clkdiv = CONFIG_SYS_EMAC_TI_CLKDIV;
        writel((clkdiv & 0xff) | MDIO_CONTROL_ENABLE | MDIO_CONTROL_FAULT,
@@ -514,8 +508,26 @@ static int davinci_eth_open(struct eth_device *dev, bd_t *bis)
        if (index == -1)
                return(0);
 
-       emac_gigabit_enable(active_phy_addr[index]);
+       /* Enable MII interface */
+       mac_control = EMAC_MACCONTROL_MIIEN_ENABLE;
+#ifdef DAVINCI_EMAC_GIG_ENABLE
+       davinci_eth_phy_read(active_phy_addr[index], MII_STAT1000, &lpa_val);
+       if (lpa_val & PHY_1000BTSR_1000FD) {
+               debug_emac("eth_open : gigabit negotiated\n");
+               mac_control |= EMAC_MACCONTROL_FULLDUPLEX_ENABLE;
+               mac_control |= EMAC_MACCONTROL_GIGABIT_ENABLE;
+       }
+#endif
 
+       davinci_eth_phy_read(active_phy_addr[index], MII_LPA, &lpa_val);
+       if (lpa_val & (LPA_100FULL | LPA_10FULL))
+               /* set EMAC for Full Duplex  */
+               mac_control |= EMAC_MACCONTROL_FULLDUPLEX_ENABLE;
+#if defined(CONFIG_SOC_DA8XX) || \
+       (defined(CONFIG_OMAP34XX) && defined(CONFIG_DRIVER_TI_EMAC_USE_RMII))
+       mac_control |= EMAC_MACCONTROL_RMIISPEED_100;
+#endif
+       writel(mac_control, &adap_emac->MACCONTROL);
        /* Start receive process */
        writel(BD_TO_HW((u_int32_t)emac_rx_desc), &adap_emac->RX0HDP);
 
@@ -620,8 +632,6 @@ static int davinci_eth_send_packet (struct eth_device *dev,
                return (ret_status);
        }
 
-       emac_gigabit_enable(active_phy_addr[index]);
-
        /* Check packet size and if < EMAC_MIN_ETHERNET_PKT_SIZE, pad it up */
        if (length < EMAC_MIN_ETHERNET_PKT_SIZE) {
                length = EMAC_MIN_ETHERNET_PKT_SIZE;
@@ -649,8 +659,6 @@ static int davinci_eth_send_packet (struct eth_device *dev,
                        return (ret_status);
                }
 
-               emac_gigabit_enable(active_phy_addr[index]);
-
                if (readl(&adap_emac->TXINTSTATRAW) & 0x01) {
                        ret_status = length;
                        break;
@@ -681,12 +689,12 @@ static int davinci_eth_rcv_packet (struct eth_device *dev)
                        printf ("WARN: emac_rcv_pkt: Error in packet\n");
                } else {
                        unsigned long tmp = (unsigned long)rx_curr_desc->buffer;
+                       unsigned short len =
+                               rx_curr_desc->buff_off_len & 0xffff;
 
-                       invalidate_dcache_range(tmp, tmp + EMAC_RXBUF_SIZE);
-                       net_process_received_packet(
-                               rx_curr_desc->buffer,
-                               rx_curr_desc->buff_off_len & 0xffff);
-                       ret = rx_curr_desc->buff_off_len & 0xffff;
+                       invalidate_dcache_range(tmp, tmp + ALIGN(len, PKTALIGN));
+                       net_process_received_packet(rx_curr_desc->buffer, len);
+                       ret = len;
                }
 
                /* Ack received packet descriptor */
@@ -871,11 +879,19 @@ int davinci_emac_initialize(void)
                retval = mdio_register(mdiodev);
                if (retval < 0)
                        return retval;
+#ifdef DAVINCI_EMAC_GIG_ENABLE
+#define PHY_CONF_REG   22
+               /* Enable PHY to clock out TX_CLK */
+               davinci_eth_phy_read(active_phy_addr[i], PHY_CONF_REG, &tmp);
+               tmp |= PHY_CONF_TXCLKEN;
+               davinci_eth_phy_write(active_phy_addr[i], PHY_CONF_REG, tmp);
+               davinci_eth_phy_read(active_phy_addr[i], PHY_CONF_REG, &tmp);
+#endif
        }
 
-#if defined(CONFIG_DRIVER_TI_EMAC_USE_RMII) && \
+#if defined(CONFIG_TI816X) || (defined(CONFIG_DRIVER_TI_EMAC_USE_RMII) && \
                defined(CONFIG_MACH_DAVINCI_DA850_EVM) && \
-                       !defined(CONFIG_DRIVER_TI_EMAC_RMII_NO_NEGOTIATE)
+                       !defined(CONFIG_DRIVER_TI_EMAC_RMII_NO_NEGOTIATE))
        for (i = 0; i < num_phy; i++) {
                if (phy[i].is_phy_connected(i))
                        phy[i].auto_negotiate(i);