+// SPDX-License-Identifier: GPL-2.0+
/*
* Ethernet driver for TI TMS320DM644x (DaVinci) chips.
*
*
* ----------------------------------------------------------------------------
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- * ----------------------------------------------------------------------------
-
* Modifications:
* ver. 1.0: Sep 2005, Anant Gole - Created EMAC version for uBoot.
* ver 1.1: Nov 2005, Anant Gole - Extended the RX logic for multiple descriptors
- *
*/
#include <common.h>
#include <command.h>
#include <net.h>
#include <miiphy.h>
#include <malloc.h>
+#include <netdev.h>
+#include <linux/compiler.h>
#include <asm/arch/emac_defs.h>
#include <asm/io.h>
+#include "davinci_emac.h"
unsigned int emac_dbg = 0;
#define debug_emac(fmt,args...) if (emac_dbg) printf(fmt,##args)
+#ifdef EMAC_HW_RAM_ADDR
+static inline unsigned long BD_TO_HW(unsigned long x)
+{
+ if (x == 0)
+ return 0;
+
+ return x - EMAC_WRAPPER_RAM_ADDR + EMAC_HW_RAM_ADDR;
+}
+
+static inline unsigned long HW_TO_BD(unsigned long x)
+{
+ if (x == 0)
+ return 0;
+
+ return x - EMAC_HW_RAM_ADDR + EMAC_WRAPPER_RAM_ADDR;
+}
+#else
+#define BD_TO_HW(x) (x)
+#define HW_TO_BD(x) (x)
+#endif
+
#ifdef DAVINCI_EMAC_GIG_ENABLE
-#define emac_gigabit_enable() davinci_eth_gigabit_enable()
+#define emac_gigabit_enable(phy_addr) davinci_eth_gigabit_enable(phy_addr)
#else
-#define emac_gigabit_enable() /* no gigabit to enable */
+#define emac_gigabit_enable(phy_addr) /* no gigabit to enable */
+#endif
+
+#if !defined(CONFIG_SYS_EMAC_TI_CLKDIV)
+#define CONFIG_SYS_EMAC_TI_CLKDIV ((EMAC_MDIO_BUS_FREQ / \
+ EMAC_MDIO_CLOCK_FREQ) - 1)
#endif
static void davinci_eth_mdio_enable(void);
static int emac_rx_queue_active = 0;
/* Receive packet buffers */
-static unsigned char emac_rx_buffers[EMAC_MAX_RX_BUFFERS * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)];
+static unsigned char emac_rx_buffers[EMAC_MAX_RX_BUFFERS * EMAC_RXBUF_SIZE]
+ __aligned(ARCH_DMA_MINALIGN);
+
+#ifndef CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
+#define CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT 3
+#endif
/* PHY address for a discovered PHY (0xff - not found) */
-static volatile u_int8_t active_phy_addr = 0xff;
+static u_int8_t active_phy_addr[CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT];
-phy_t phy;
+/* number of PHY found active */
+static u_int8_t num_phy;
+
+phy_t phy[CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT];
static int davinci_eth_set_mac_addr(struct eth_device *dev)
{
{
u_int32_t clkdiv;
- clkdiv = (EMAC_MDIO_BUS_FREQ / EMAC_MDIO_CLOCK_FREQ) - 1;
+ clkdiv = CONFIG_SYS_EMAC_TI_CLKDIV;
writel((clkdiv & 0xff) |
MDIO_CONTROL_ENABLE |
{
u_int32_t phy_act_state;
int i;
+ int j;
+ unsigned int count = 0;
+
+ for (i = 0; i < CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT; i++)
+ active_phy_addr[i] = 0xff;
- active_phy_addr = 0xff;
+ udelay(1000);
+ phy_act_state = readl(&adap_mdio->ALIVE);
- phy_act_state = readl(&adap_mdio->ALIVE) & EMAC_MDIO_PHY_MASK;
if (phy_act_state == 0)
- return(0); /* No active PHYs */
+ return 0; /* No active PHYs */
debug_emac("davinci_eth_phy_detect(), ALIVE = 0x%08x\n", phy_act_state);
- for (i = 0; i < 32; i++) {
+ for (i = 0, j = 0; i < 32; i++)
if (phy_act_state & (1 << i)) {
- if (phy_act_state & ~(1 << i))
- return(0); /* More than one PHY */
- else {
- active_phy_addr = i;
- return(1);
+ count++;
+ if (count <= CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT) {
+ active_phy_addr[j++] = i;
+ } else {
+ printf("%s: to many PHYs detected.\n",
+ __func__);
+ count = 0;
+ break;
}
}
- }
- return(0); /* Just to make GCC happy */
+ num_phy = count;
+
+ return count;
}
if (tmp & MDIO_USERACCESS0_ACK) {
*data = tmp & 0xffff;
- return(1);
+ return 1;
}
- *data = -1;
- return(0);
+ return 0;
}
/* Write to a PHY register via MDIO inteface. Blocks until operation is complete. */
while (readl(&adap_mdio->USERACCESS0) & MDIO_USERACCESS0_GO)
;
- return(1);
+ return 1;
}
/* PHY functions for a generic PHY */
{
u_int16_t dummy;
- return(davinci_eth_phy_read(phy_addr, MII_PHYSID1, &dummy));
+ return davinci_eth_phy_read(phy_addr, MII_PHYSID1, &dummy);
+}
+
+static int get_active_phy(void)
+{
+ int i;
+
+ for (i = 0; i < num_phy; i++)
+ if (phy[i].get_link_speed(active_phy_addr[i]))
+ return i;
+
+ return -1; /* Return error if no link */
}
static int gen_get_link_speed(int phy_addr)
static int gen_auto_negotiate(int phy_addr)
{
u_int16_t tmp;
+ u_int16_t val;
+ unsigned long cntr = 0;
+
+ if (!davinci_eth_phy_read(phy_addr, MII_BMCR, &tmp))
+ return 0;
+
+ val = tmp | BMCR_FULLDPLX | BMCR_ANENABLE |
+ BMCR_SPEED100;
+ davinci_eth_phy_write(phy_addr, MII_BMCR, val);
+
+ if (!davinci_eth_phy_read(phy_addr, MII_ADVERTISE, &val))
+ return 0;
+
+ val |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL |
+ ADVERTISE_10HALF);
+ davinci_eth_phy_write(phy_addr, MII_ADVERTISE, val);
if (!davinci_eth_phy_read(phy_addr, MII_BMCR, &tmp))
return(0);
+#ifdef DAVINCI_EMAC_GIG_ENABLE
+ davinci_eth_phy_read(phy_addr, MII_CTRL1000, &val);
+ val |= PHY_1000BTCR_1000FD;
+ val &= ~PHY_1000BTCR_1000HD;
+ davinci_eth_phy_write(phy_addr, MII_CTRL1000, val);
+ davinci_eth_phy_read(phy_addr, MII_CTRL1000, &val);
+#endif
+
/* Restart Auto_negotiation */
- tmp |= BMCR_ANENABLE;
+ tmp |= BMCR_ANRESTART;
davinci_eth_phy_write(phy_addr, MII_BMCR, tmp);
/*check AutoNegotiate complete */
- udelay (10000);
+ do {
+ udelay(40000);
+ if (!davinci_eth_phy_read(phy_addr, MII_BMSR, &tmp))
+ return 0;
+
+ if (tmp & BMSR_ANEGCOMPLETE)
+ break;
+
+ cntr++;
+ } while (cntr < 200);
+
if (!davinci_eth_phy_read(phy_addr, MII_BMSR, &tmp))
return(0);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
-static int davinci_mii_phy_read(const char *devname, unsigned char addr, unsigned char reg, unsigned short *value)
+static int davinci_mii_phy_read(struct mii_dev *bus, int addr, int devad,
+ int reg)
{
- return(davinci_eth_phy_read(addr, reg, value) ? 0 : 1);
+ unsigned short value = 0;
+ int retval = davinci_eth_phy_read(addr, reg, &value);
+
+ return retval ? value : -EIO;
}
-static int davinci_mii_phy_write(const char *devname, unsigned char addr, unsigned char reg, unsigned short value)
+static int davinci_mii_phy_write(struct mii_dev *bus, int addr, int devad,
+ int reg, u16 value)
{
- return(davinci_eth_phy_write(addr, reg, value) ? 0 : 1);
+ return davinci_eth_phy_write(addr, reg, value) ? 0 : 1;
}
#endif
-static void __attribute__((unused)) davinci_eth_gigabit_enable(void)
+static void __attribute__((unused)) davinci_eth_gigabit_enable(int phy_addr)
{
u_int16_t data;
- if (davinci_eth_phy_read(EMAC_MDIO_PHY_NUM, 0, &data)) {
+ if (davinci_eth_phy_read(phy_addr, 0, &data)) {
if (data & (1 << 6)) { /* speed selection MSB */
/*
* Check if link detected is giga-bit
static int davinci_eth_open(struct eth_device *dev, bd_t *bis)
{
dv_reg_p addr;
- u_int32_t clkdiv, cnt;
+ u_int32_t clkdiv, cnt, mac_control;
+ uint16_t __maybe_unused lpa_val;
volatile emac_desc *rx_desc;
+ int index;
debug_emac("+ emac_open\n");
/* Set DMA 8 TX / 8 RX Head pointers to 0 */
addr = &adap_emac->TX0HDP;
- for(cnt = 0; cnt < 16; cnt++)
+ for (cnt = 0; cnt < 8; cnt++)
writel(0, addr++);
addr = &adap_emac->RX0HDP;
- for(cnt = 0; cnt < 16; cnt++)
+ for (cnt = 0; cnt < 8; cnt++)
writel(0, addr++);
/* Clear Statistics (do this before setting MacControl register) */
/* Create RX queue and set receive process in place */
emac_rx_active_head = emac_rx_desc;
for (cnt = 0; cnt < EMAC_MAX_RX_BUFFERS; cnt++) {
- rx_desc->next = (u_int32_t)(rx_desc + 1);
- rx_desc->buffer = &emac_rx_buffers[cnt * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)];
+ rx_desc->next = BD_TO_HW((u_int32_t)(rx_desc + 1));
+ rx_desc->buffer = &emac_rx_buffers[cnt * EMAC_RXBUF_SIZE];
rx_desc->buff_off_len = EMAC_MAX_ETHERNET_PKT_SIZE;
rx_desc->pkt_flag_len = EMAC_CPPI_OWNERSHIP_BIT;
rx_desc++;
/* Enable ch 0 only */
writel(1, &adap_emac->RXUNICASTSET);
- /* Enable MII interface and Full duplex mode */
-#ifdef CONFIG_SOC_DA8XX
- writel((EMAC_MACCONTROL_MIIEN_ENABLE |
- EMAC_MACCONTROL_FULLDUPLEX_ENABLE |
- EMAC_MACCONTROL_RMIISPEED_100),
- &adap_emac->MACCONTROL);
-#else
- writel((EMAC_MACCONTROL_MIIEN_ENABLE |
- EMAC_MACCONTROL_FULLDUPLEX_ENABLE),
- &adap_emac->MACCONTROL);
-#endif
-
/* Init MDIO & get link state */
- clkdiv = (EMAC_MDIO_BUS_FREQ / EMAC_MDIO_CLOCK_FREQ) - 1;
+ clkdiv = CONFIG_SYS_EMAC_TI_CLKDIV;
writel((clkdiv & 0xff) | MDIO_CONTROL_ENABLE | MDIO_CONTROL_FAULT,
&adap_mdio->CONTROL);
/* We need to wait for MDIO to start */
udelay(1000);
- if (!phy.get_link_speed(active_phy_addr))
+ index = get_active_phy();
+ if (index == -1)
return(0);
- emac_gigabit_enable();
+ /* Enable MII interface */
+ mac_control = EMAC_MACCONTROL_MIIEN_ENABLE;
+#ifdef DAVINCI_EMAC_GIG_ENABLE
+ davinci_eth_phy_read(active_phy_addr[index], MII_STAT1000, &lpa_val);
+ if (lpa_val & PHY_1000BTSR_1000FD) {
+ debug_emac("eth_open : gigabit negotiated\n");
+ mac_control |= EMAC_MACCONTROL_FULLDUPLEX_ENABLE;
+ mac_control |= EMAC_MACCONTROL_GIGABIT_ENABLE;
+ }
+#endif
+ davinci_eth_phy_read(active_phy_addr[index], MII_LPA, &lpa_val);
+ if (lpa_val & (LPA_100FULL | LPA_10FULL))
+ /* set EMAC for Full Duplex */
+ mac_control |= EMAC_MACCONTROL_FULLDUPLEX_ENABLE;
+#if defined(CONFIG_SOC_DA8XX) || \
+ (defined(CONFIG_OMAP34XX) && defined(CONFIG_DRIVER_TI_EMAC_USE_RMII))
+ mac_control |= EMAC_MACCONTROL_RMIISPEED_100;
+#endif
+ writel(mac_control, &adap_emac->MACCONTROL);
/* Start receive process */
- writel((u_int32_t)emac_rx_desc, &adap_emac->RX0HDP);
+ writel(BD_TO_HW((u_int32_t)emac_rx_desc), &adap_emac->RX0HDP);
debug_emac("- emac_open\n");
debug_emac("+ emac_close\n");
davinci_eth_ch_teardown(EMAC_CH_TX); /* TX Channel teardown */
- davinci_eth_ch_teardown(EMAC_CH_RX); /* RX Channel teardown */
+ if (readl(&adap_emac->RXCONTROL) & 1)
+ davinci_eth_ch_teardown(EMAC_CH_RX); /* RX Channel teardown */
/* Reset EMAC module and disable interrupts in wrapper */
writel(1, &adap_emac->SOFTRESET);
* positive number (number of bytes transmitted) or negative for error
*/
static int davinci_eth_send_packet (struct eth_device *dev,
- volatile void *packet, int length)
+ void *packet, int length)
{
int ret_status = -1;
-
+ int index;
tx_send_loop = 0;
- /* Return error if no link */
- if (!phy.get_link_speed (active_phy_addr)) {
- printf ("WARN: emac_send_packet: No link\n");
+ index = get_active_phy();
+ if (index == -1) {
+ printf(" WARN: emac_send_packet: No link\n");
return (ret_status);
}
- emac_gigabit_enable();
-
/* Check packet size and if < EMAC_MIN_ETHERNET_PKT_SIZE, pad it up */
if (length < EMAC_MIN_ETHERNET_PKT_SIZE) {
length = EMAC_MIN_ETHERNET_PKT_SIZE;
EMAC_CPPI_SOP_BIT |
EMAC_CPPI_OWNERSHIP_BIT |
EMAC_CPPI_EOP_BIT);
+
+ flush_dcache_range((unsigned long)packet,
+ (unsigned long)packet + ALIGN(length, PKTALIGN));
+
/* Send the packet */
- writel((unsigned long)emac_tx_desc, &adap_emac->TX0HDP);
+ writel(BD_TO_HW((unsigned long)emac_tx_desc), &adap_emac->TX0HDP);
/* Wait for packet to complete or link down */
while (1) {
- if (!phy.get_link_speed (active_phy_addr)) {
+ if (!phy[index].get_link_speed(active_phy_addr[index])) {
davinci_eth_ch_teardown (EMAC_CH_TX);
return (ret_status);
}
- emac_gigabit_enable();
-
if (readl(&adap_emac->TXINTSTATRAW) & 0x01) {
ret_status = length;
break;
int status, ret = -1;
rx_curr_desc = emac_rx_active_head;
+ if (!rx_curr_desc)
+ return 0;
status = rx_curr_desc->pkt_flag_len;
- if ((rx_curr_desc) && ((status & EMAC_CPPI_OWNERSHIP_BIT) == 0)) {
+ if ((status & EMAC_CPPI_OWNERSHIP_BIT) == 0) {
if (status & EMAC_CPPI_RX_ERROR_FRAME) {
/* Error in packet - discard it and requeue desc */
printf ("WARN: emac_rcv_pkt: Error in packet\n");
} else {
- NetReceive (rx_curr_desc->buffer,
- (rx_curr_desc->buff_off_len & 0xffff));
- ret = rx_curr_desc->buff_off_len & 0xffff;
+ unsigned long tmp = (unsigned long)rx_curr_desc->buffer;
+ unsigned short len =
+ rx_curr_desc->buff_off_len & 0xffff;
+
+ invalidate_dcache_range(tmp, tmp + ALIGN(len, PKTALIGN));
+ net_process_received_packet(rx_curr_desc->buffer, len);
+ ret = len;
}
/* Ack received packet descriptor */
- writel((unsigned long)rx_curr_desc, &adap_emac->RX0CP);
+ writel(BD_TO_HW((ulong)rx_curr_desc), &adap_emac->RX0CP);
curr_desc = rx_curr_desc;
emac_rx_active_head =
- (volatile emac_desc *) rx_curr_desc->next;
+ (volatile emac_desc *) (HW_TO_BD(rx_curr_desc->next));
if (status & EMAC_CPPI_EOQ_BIT) {
if (emac_rx_active_head) {
- writel((unsigned long)emac_rx_active_head,
+ writel(BD_TO_HW((ulong)emac_rx_active_head),
&adap_emac->RX0HDP);
} else {
emac_rx_queue_active = 0;
emac_rx_active_head = curr_desc;
emac_rx_active_tail = curr_desc;
if (emac_rx_queue_active != 0) {
- writel((unsigned long)emac_rx_active_head,
+ writel(BD_TO_HW((ulong)emac_rx_active_head),
&adap_emac->RX0HDP);
printf ("INFO: emac_rcv_pkt: active queue head = 0, HDP fired\n");
emac_rx_queue_active = 1;
} else {
tail_desc = emac_rx_active_tail;
emac_rx_active_tail = curr_desc;
- tail_desc->next = (unsigned int) curr_desc;
+ tail_desc->next = BD_TO_HW((ulong) curr_desc);
status = tail_desc->pkt_flag_len;
if (status & EMAC_CPPI_EOQ_BIT) {
- writel((unsigned long)curr_desc,
+ writel(BD_TO_HW((ulong)curr_desc),
&adap_emac->RX0HDP);
status &= ~EMAC_CPPI_EOQ_BIT;
tail_desc->pkt_flag_len = status;
u_int32_t phy_id;
u_int16_t tmp;
int i;
+ int ret;
struct eth_device *dev;
dev = malloc(sizeof *dev);
return -1;
memset(dev, 0, sizeof *dev);
- sprintf(dev->name, "DaVinci-EMAC");
+ strcpy(dev->name, "DaVinci-EMAC");
dev->iobase = 0;
dev->init = davinci_eth_open;
davinci_eth_mdio_enable();
+ /* let the EMAC detect the PHYs */
+ udelay(5000);
+
for (i = 0; i < 256; i++) {
if (readl(&adap_mdio->ALIVE))
break;
- udelay(10);
+ udelay(1000);
}
if (i >= 256) {
return(0);
}
- /* Find if a PHY is connected and get it's address */
- if (!davinci_eth_phy_detect())
+ /* Find if PHY(s) is/are connected */
+ ret = davinci_eth_phy_detect();
+ if (!ret)
return(0);
+ else
+ debug_emac(" %d ETH PHY detected\n", ret);
/* Get PHY ID and initialize phy_ops for a detected PHY */
- if (!davinci_eth_phy_read(active_phy_addr, MII_PHYSID1, &tmp)) {
- active_phy_addr = 0xff;
- return(0);
- }
-
- phy_id = (tmp << 16) & 0xffff0000;
+ for (i = 0; i < num_phy; i++) {
+ if (!davinci_eth_phy_read(active_phy_addr[i], MII_PHYSID1,
+ &tmp)) {
+ active_phy_addr[i] = 0xff;
+ continue;
+ }
- if (!davinci_eth_phy_read(active_phy_addr, MII_PHYSID2, &tmp)) {
- active_phy_addr = 0xff;
- return(0);
- }
+ phy_id = (tmp << 16) & 0xffff0000;
- phy_id |= tmp & 0x0000ffff;
+ if (!davinci_eth_phy_read(active_phy_addr[i], MII_PHYSID2,
+ &tmp)) {
+ active_phy_addr[i] = 0xff;
+ continue;
+ }
- switch (phy_id) {
+ phy_id |= tmp & 0x0000ffff;
+
+ switch (phy_id) {
+#ifdef PHY_KSZ8873
+ case PHY_KSZ8873:
+ sprintf(phy[i].name, "KSZ8873 @ 0x%02x",
+ active_phy_addr[i]);
+ phy[i].init = ksz8873_init_phy;
+ phy[i].is_phy_connected = ksz8873_is_phy_connected;
+ phy[i].get_link_speed = ksz8873_get_link_speed;
+ phy[i].auto_negotiate = ksz8873_auto_negotiate;
+ break;
+#endif
+#ifdef PHY_LXT972
case PHY_LXT972:
- sprintf(phy.name, "LXT972 @ 0x%02x", active_phy_addr);
- phy.init = lxt972_init_phy;
- phy.is_phy_connected = lxt972_is_phy_connected;
- phy.get_link_speed = lxt972_get_link_speed;
- phy.auto_negotiate = lxt972_auto_negotiate;
+ sprintf(phy[i].name, "LXT972 @ 0x%02x",
+ active_phy_addr[i]);
+ phy[i].init = lxt972_init_phy;
+ phy[i].is_phy_connected = lxt972_is_phy_connected;
+ phy[i].get_link_speed = lxt972_get_link_speed;
+ phy[i].auto_negotiate = lxt972_auto_negotiate;
break;
+#endif
+#ifdef PHY_DP83848
case PHY_DP83848:
- sprintf(phy.name, "DP83848 @ 0x%02x", active_phy_addr);
- phy.init = dp83848_init_phy;
- phy.is_phy_connected = dp83848_is_phy_connected;
- phy.get_link_speed = dp83848_get_link_speed;
- phy.auto_negotiate = dp83848_auto_negotiate;
+ sprintf(phy[i].name, "DP83848 @ 0x%02x",
+ active_phy_addr[i]);
+ phy[i].init = dp83848_init_phy;
+ phy[i].is_phy_connected = dp83848_is_phy_connected;
+ phy[i].get_link_speed = dp83848_get_link_speed;
+ phy[i].auto_negotiate = dp83848_auto_negotiate;
break;
+#endif
+#ifdef PHY_ET1011C
case PHY_ET1011C:
- sprintf(phy.name, "ET1011C @ 0x%02x", active_phy_addr);
- phy.init = gen_init_phy;
- phy.is_phy_connected = gen_is_phy_connected;
- phy.get_link_speed = et1011c_get_link_speed;
- phy.auto_negotiate = gen_auto_negotiate;
+ sprintf(phy[i].name, "ET1011C @ 0x%02x",
+ active_phy_addr[i]);
+ phy[i].init = gen_init_phy;
+ phy[i].is_phy_connected = gen_is_phy_connected;
+ phy[i].get_link_speed = et1011c_get_link_speed;
+ phy[i].auto_negotiate = gen_auto_negotiate;
break;
+#endif
default:
- sprintf(phy.name, "GENERIC @ 0x%02x", active_phy_addr);
- phy.init = gen_init_phy;
- phy.is_phy_connected = gen_is_phy_connected;
- phy.get_link_speed = gen_get_link_speed;
- phy.auto_negotiate = gen_auto_negotiate;
- }
+ sprintf(phy[i].name, "GENERIC @ 0x%02x",
+ active_phy_addr[i]);
+ phy[i].init = gen_init_phy;
+ phy[i].is_phy_connected = gen_is_phy_connected;
+ phy[i].get_link_speed = gen_get_link_speed;
+ phy[i].auto_negotiate = gen_auto_negotiate;
+ }
+
+ debug("Ethernet PHY: %s\n", phy[i].name);
+
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, phy[i].name, MDIO_NAME_LEN);
+ mdiodev->read = davinci_mii_phy_read;
+ mdiodev->write = davinci_mii_phy_write;
- printf("Ethernet PHY: %s\n", phy.name);
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
+#ifdef DAVINCI_EMAC_GIG_ENABLE
+#define PHY_CONF_REG 22
+ /* Enable PHY to clock out TX_CLK */
+ davinci_eth_phy_read(active_phy_addr[i], PHY_CONF_REG, &tmp);
+ tmp |= PHY_CONF_TXCLKEN;
+ davinci_eth_phy_write(active_phy_addr[i], PHY_CONF_REG, tmp);
+ davinci_eth_phy_read(active_phy_addr[i], PHY_CONF_REG, &tmp);
+#endif
+ }
- miiphy_register(phy.name, davinci_mii_phy_read, davinci_mii_phy_write);
+#if defined(CONFIG_TI816X) || (defined(CONFIG_DRIVER_TI_EMAC_USE_RMII) && \
+ defined(CONFIG_MACH_DAVINCI_DA850_EVM) && \
+ !defined(CONFIG_DRIVER_TI_EMAC_RMII_NO_NEGOTIATE))
+ for (i = 0; i < num_phy; i++) {
+ if (phy[i].is_phy_connected(i))
+ phy[i].auto_negotiate(i);
+ }
+#endif
return(1);
}