FEC: Add timeout for chip reset

[u-boot] / drivers / net / enc28j60.c

diff --git a/drivers/net/enc28j60.c b/drivers/net/enc28j60.c
index 6c161b632f4165b87e7939c5ae494f736d72e855..d55cacdac8c0acf9b453d0341c779b2856b77571 100644 (file)
--- a/drivers/net/enc28j60.c
+++ b/drivers/net/enc28j60.c
@@ -314,7 +314,7 @@ static void enc_release_bus(enc_dev_t *enc)
 /*
  * Read PHY register
  */
-static u16 phy_read(enc_dev_t *enc, const u8 addr)
+static u16 enc_phy_read(enc_dev_t *enc, const u8 addr)
 {
        uint64_t etime;
        u8 status;
@@ -339,7 +339,7 @@ static u16 phy_read(enc_dev_t *enc, const u8 addr)
 /*
  * Write PHY register
  */
-static void phy_write(enc_dev_t *enc, const u8 addr, const u16 data)
+static void enc_phy_write(enc_dev_t *enc, const u8 addr, const u16 data)
 {
        uint64_t etime;
        u8 status;
@@ -374,7 +374,7 @@ static int enc_phy_link_wait(enc_dev_t *enc)
 
 #ifdef CONFIG_ENC_SILENTLINK
        /* check if we have a link, then just return */
-       status = phy_read(enc, PHY_REG_PHSTAT1);
+       status = enc_phy_read(enc, PHY_REG_PHSTAT1);
        if (status & ENC_PHSTAT1_LLSTAT)
                return 0;
 #endif
@@ -382,10 +382,10 @@ static int enc_phy_link_wait(enc_dev_t *enc)
        /* wait for link with 1 second timeout */
        etime = get_ticks() + get_tbclk();
        while (get_ticks() <= etime) {
-               status = phy_read(enc, PHY_REG_PHSTAT1);
+               status = enc_phy_read(enc, PHY_REG_PHSTAT1);
                if (status & ENC_PHSTAT1_LLSTAT) {
                        /* now we have a link */
-                       status = phy_read(enc, PHY_REG_PHSTAT2);
+                       status = enc_phy_read(enc, PHY_REG_PHSTAT2);
                        duplex = (status & ENC_PHSTAT2_DPXSTAT) ? 1 : 0;
                        printf("%s: link up, 10Mbps %s-duplex\n",
                                enc->dev->name, duplex ? "full" : "half");
@@ -678,8 +678,8 @@ static int enc_setup(enc_dev_t *enc)
        enc->bank = 0xff;       /* invalidate current bank in enc28j60 */
 
        /* verify PHY identification */
-       phid1 = phy_read(enc, PHY_REG_PHID1);
-       phid2 = phy_read(enc, PHY_REG_PHID2) & ENC_PHID2_MASK;
+       phid1 = enc_phy_read(enc, PHY_REG_PHID1);
+       phid2 = enc_phy_read(enc, PHY_REG_PHID2) & ENC_PHID2_MASK;
        if (phid1 != ENC_PHID1_VALUE || phid2 != ENC_PHID2_VALUE) {
                printf("%s: failed to identify PHY. Found %04x:%04x\n",
                        enc->dev->name, phid1, phid2);
@@ -694,7 +694,7 @@ static int enc_setup(enc_dev_t *enc)
         * Prevent automatic loopback of data beeing transmitted by setting
         * ENC_PHCON2_HDLDIS
         */
-       phy_write(enc, PHY_REG_PHCON2, (1<<8));
+       enc_phy_write(enc, PHY_REG_PHCON2, (1<<8));
 
        /*
         * LEDs configuration
@@ -702,10 +702,10 @@ static int enc_setup(enc_dev_t *enc)
         * LEDB: LBCFG = 0111 -> display TX & RX activity
         * STRCH = 1 -> LED pulses
         */
-       phy_write(enc, PHY_REG_PHLCON, 0x0472);
+       enc_phy_write(enc, PHY_REG_PHLCON, 0x0472);
 
        /* Reset PDPXMD-bit => half duplex */
-       phy_write(enc, PHY_REG_PHCON1, 0);
+       enc_phy_write(enc, PHY_REG_PHCON1, 0);
 
 #ifdef CONFIG_USE_IRQ
        /* enable interrupts */
@@ -771,7 +771,7 @@ int enc_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)
                enc_release_bus(enc);
                return -1;
        }
-       *value = phy_read(enc, reg);
+       *value = enc_phy_read(enc, reg);
        enc_release_bus(enc);
        return 0;
 }
@@ -796,7 +796,7 @@ int enc_miiphy_write(const char *devname, u8 phy_adr, u8 reg, u16 value)
                enc_release_bus(enc);
                return -1;
        }
-       phy_write(enc, reg, value);
+       enc_phy_write(enc, reg, value);
        enc_release_bus(enc);
        return 0;
 }