Timer: Fix misuse of ARM *timer_masked() functions outside arch/arm

[u-boot] / drivers / net / fec_mxc.c

diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 0d0f392d1ef5aa84ed184885308051e85f853b34..ab90afa41eb8f30c4a0611b155032473e9268c35 100644 (file)
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -86,7 +86,7 @@ static int fec_miiphy_read(const char *dev, uint8_t phyAddr, uint8_t regAddr,
        /*
         * wait for the related interrupt
         */
-       start = get_timer_masked();
+       start = get_timer(0);
        while (!(readl(&fec->eth->ievent) & FEC_IEVENT_MII)) {
                if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) {
                        printf("Read MDIO failed...\n");
@@ -138,7 +138,7 @@ static int fec_miiphy_write(const char *dev, uint8_t phyAddr, uint8_t regAddr,
        /*
         * wait for the MII interrupt
         */
-       start = get_timer_masked();
+       start = get_timer(0);
        while (!(readl(&fec->eth->ievent) & FEC_IEVENT_MII)) {
                if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) {
                        printf("Write MDIO failed...\n");
@@ -163,20 +163,20 @@ static int miiphy_restart_aneg(struct eth_device *dev)
         * Reset PHY, then delay 300ns
         */
 #ifdef CONFIG_MX27
-       miiphy_write(dev->name, CONFIG_FEC_MXC_PHYADDR, PHY_MIPGSR, 0x00FF);
+       miiphy_write(dev->name, CONFIG_FEC_MXC_PHYADDR, MII_DCOUNTER, 0x00FF);
 #endif
-       miiphy_write(dev->name, CONFIG_FEC_MXC_PHYADDR, PHY_BMCR,
-                       PHY_BMCR_RESET);
+       miiphy_write(dev->name, CONFIG_FEC_MXC_PHYADDR, MII_BMCR,
+                       BMCR_RESET);
        udelay(1000);
 
        /*
         * Set the auto-negotiation advertisement register bits
         */
-       miiphy_write(dev->name, CONFIG_FEC_MXC_PHYADDR, PHY_ANAR,
-                       PHY_ANLPAR_TXFD | PHY_ANLPAR_TX | PHY_ANLPAR_10FD |
-                       PHY_ANLPAR_10 | PHY_ANLPAR_PSB_802_3);
-       miiphy_write(dev->name, CONFIG_FEC_MXC_PHYADDR, PHY_BMCR,
-                       PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);
+       miiphy_write(dev->name, CONFIG_FEC_MXC_PHYADDR, MII_ADVERTISE,
+                       LPA_100FULL | LPA_100HALF | LPA_10FULL |
+                       LPA_10HALF | PHY_ANLPAR_PSB_802_3);
+       miiphy_write(dev->name, CONFIG_FEC_MXC_PHYADDR, MII_BMCR,
+                       BMCR_ANENABLE | BMCR_ANRESTART);
 
        return 0;
 }
@@ -189,7 +189,7 @@ static int miiphy_wait_aneg(struct eth_device *dev)
        /*
         * Wait for AN completion
         */
-       start = get_timer_masked();
+       start = get_timer(0);
        do {
                if (get_timer(start) > (CONFIG_SYS_HZ * 5)) {
                        printf("%s: Autonegotiation timeout\n", dev->name);
@@ -197,12 +197,12 @@ static int miiphy_wait_aneg(struct eth_device *dev)
                }
 
                if (miiphy_read(dev->name, CONFIG_FEC_MXC_PHYADDR,
-                                       PHY_BMSR, &status)) {
+                                       MII_BMSR, &status)) {
                        printf("%s: Autonegotiation failed. status: 0x%04x\n",
                                        dev->name, status);
                        return -1;
                }
-       } while (!(status & PHY_BMSR_LS));
+       } while (!(status & BMSR_LSTATUS));
 
        return 0;
 }
@@ -354,7 +354,7 @@ static int fec_open(struct eth_device *edev)
         */
        writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_ETHER_EN,
                &fec->eth->ecntrl);
-#ifdef CONFIG_MX25
+#if defined(CONFIG_MX25) || defined(CONFIG_MX53)
        udelay(100);
        /*
         * setup the MII gasket for RMII mode