+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2009-2012 Freescale Semiconductor, Inc.
* Dave Liu <daveliu@freescale.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <fsl_mdio.h>
#include <miiphy.h>
#include <phy.h>
-#include <asm/fsl_dtsec.h>
-#include <asm/fsl_tgec.h>
-#include <asm/fsl_memac.h>
+#include <fsl_dtsec.h>
+#include <fsl_tgec.h>
+#include <fsl_memac.h>
#include "fm.h"
TBICR_FULL_DUPLEX | TBICR_SPEED1_SET)
/* Configure the TBI for SGMII operation */
-void dtsec_configure_serdes(struct fm_eth *priv)
+static void dtsec_configure_serdes(struct fm_eth *priv)
{
#ifdef CONFIG_SYS_FMAN_V3
u32 value;
struct mii_dev bus;
bus.priv = priv->mac->phyregs;
+ bool sgmii_2500 = (priv->enet_if ==
+ PHY_INTERFACE_MODE_SGMII_2500) ? true : false;
+ int i = 0;
+
+qsgmii_loop:
+ /* SGMII IF mode + AN enable only for 1G SGMII, not for 2.5G */
+ if (sgmii_2500)
+ value = PHY_SGMII_CR_PHY_RESET |
+ PHY_SGMII_IF_SPEED_GIGABIT |
+ PHY_SGMII_IF_MODE_SGMII;
+ else
+ value = PHY_SGMII_IF_MODE_SGMII | PHY_SGMII_IF_MODE_AN;
- /* SGMII IF mode + AN enable */
- value = PHY_SGMII_IF_MODE_AN | PHY_SGMII_IF_MODE_SGMII;
- memac_mdio_write(&bus, 0, MDIO_DEVAD_NONE, 0x14, value);
+ memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x14, value);
/* Dev ability according to SGMII specification */
value = PHY_SGMII_DEV_ABILITY_SGMII;
- memac_mdio_write(&bus, 0, MDIO_DEVAD_NONE, 0x4, value);
-
- /* Adjust link timer for SGMII -
- 1.6 ms in units of 8 ns = 2 * 10^5 = 0x30d40 */
- memac_mdio_write(&bus, 0, MDIO_DEVAD_NONE, 0x13, 0x3);
- memac_mdio_write(&bus, 0, MDIO_DEVAD_NONE, 0x12, 0xd40);
+ memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x4, value);
+
+ if (sgmii_2500) {
+ /* Adjust link timer for 2.5G SGMII,
+ * 1.6 ms in units of 3.2 ns:
+ * 1.6ms / 3.2ns = 5 * 10^5 = 0x7a120.
+ */
+ memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x13, 0x0007);
+ memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x12, 0xa120);
+ } else {
+ /* Adjust link timer for SGMII,
+ * 1.6 ms in units of 8 ns:
+ * 1.6ms / 8ns = 2 * 10^5 = 0x30d40.
+ */
+ memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x13, 0x0003);
+ memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x12, 0x0d40);
+ }
/* Restart AN */
value = PHY_SGMII_CR_DEF_VAL | PHY_SGMII_CR_RESET_AN;
- memac_mdio_write(&bus, 0, MDIO_DEVAD_NONE, 0, value);
+ memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0, value);
+
+ if ((priv->enet_if == PHY_INTERFACE_MODE_QSGMII) && (i < 3)) {
+ i++;
+ goto qsgmii_loop;
+ }
#else
struct dtsec *regs = priv->mac->base;
struct tsec_mii_mng *phyregs = priv->mac->phyregs;
out_be32(®s->tbipa, CONFIG_SYS_TBIPA_VALUE);
#endif
- if (fm_eth->enet_if == PHY_INTERFACE_MODE_SGMII)
+ if (fm_eth->enet_if == PHY_INTERFACE_MODE_SGMII ||
+ fm_eth->enet_if == PHY_INTERFACE_MODE_QSGMII ||
+ fm_eth->enet_if == PHY_INTERFACE_MODE_SGMII_2500)
dtsec_configure_serdes(fm_eth);
}
+#ifdef CONFIG_PHYLIB
static int tgec_is_fibre(struct eth_device *dev)
{
struct fm_eth *fm = dev->priv;
return hwconfig_arg_cmp(phyopt, "xfi");
}
#endif
+#endif
static u16 muram_readw(u16 *addr)
{
- u32 base = (u32)addr & ~0x3;
- u32 val32 = *(u32 *)base;
+ ulong base = (ulong)addr & ~0x3UL;
+ u32 val32 = in_be32((void *)base);
int byte_pos;
u16 ret;
- byte_pos = (u32)addr & 0x3;
+ byte_pos = (ulong)addr & 0x3UL;
if (byte_pos)
ret = (u16)(val32 & 0x0000ffff);
else
static void muram_writew(u16 *addr, u16 val)
{
- u32 base = (u32)addr & ~0x3;
- u32 org32 = *(u32 *)base;
+ ulong base = (ulong)addr & ~0x3UL;
+ u32 org32 = in_be32((void *)base);
u32 val32;
int byte_pos;
- byte_pos = (u32)addr & 0x3;
+ byte_pos = (ulong)addr & 0x3UL;
if (byte_pos)
val32 = (org32 & 0xffff0000) | val;
else
val32 = (org32 & 0x0000ffff) | ((u32)val << 16);
- *(u32 *)base = val32;
+ out_be32((void *)base, val32);
}
static void bmi_rx_port_disable(struct fm_bmi_rx_port *rx_port)
u32 pram_page_offset;
void *rx_bd_ring_base;
void *rx_buf_pool;
+ u32 bd_ring_base_lo, bd_ring_base_hi;
+ u32 buf_lo, buf_hi;
struct fm_port_bd *rxbd;
struct fm_port_qd *rxqd;
struct fm_bmi_rx_port *bmi_rx_port = fm_eth->rx_port;
/* alloc global parameter ram at MURAM */
pram = (struct fm_port_global_pram *)fm_muram_alloc(fm_eth->fm_index,
FM_PRAM_SIZE, FM_PRAM_ALIGN);
+ if (!pram) {
+ printf("%s: No muram for Rx global parameter\n", __func__);
+ return -ENOMEM;
+ }
+
fm_eth->rx_pram = pram;
/* parameter page offset to MURAM */
- pram_page_offset = (u32)pram - fm_muram_base(fm_eth->fm_index);
+ pram_page_offset = (void *)pram - fm_muram_base(fm_eth->fm_index);
/* enable global mode- snooping data buffers and BDs */
- pram->mode = PRAM_MODE_GLOBAL;
+ out_be32(&pram->mode, PRAM_MODE_GLOBAL);
/* init the Rx queue descriptor pionter */
- pram->rxqd_ptr = pram_page_offset + 0x20;
+ out_be32(&pram->rxqd_ptr, pram_page_offset + 0x20);
/* set the max receive buffer length, power of 2 */
muram_writew(&pram->mrblr, MAX_RXBUF_LOG2);
rx_bd_ring_base = malloc(sizeof(struct fm_port_bd)
* RX_BD_RING_SIZE);
if (!rx_bd_ring_base)
- return 0;
+ return -ENOMEM;
+
memset(rx_bd_ring_base, 0, sizeof(struct fm_port_bd)
* RX_BD_RING_SIZE);
/* alloc Rx buffer from main memory */
rx_buf_pool = malloc(MAX_RXBUF_LEN * RX_BD_RING_SIZE);
if (!rx_buf_pool)
- return 0;
+ return -ENOMEM;
+
memset(rx_buf_pool, 0, MAX_RXBUF_LEN * RX_BD_RING_SIZE);
+ debug("%s: rx_buf_pool = %p\n", __func__, rx_buf_pool);
/* save them to fm_eth */
fm_eth->rx_bd_ring = rx_bd_ring_base;
/* init Rx BDs ring */
rxbd = (struct fm_port_bd *)rx_bd_ring_base;
for (i = 0; i < RX_BD_RING_SIZE; i++) {
- rxbd->status = RxBD_EMPTY;
- rxbd->len = 0;
- rxbd->buf_ptr_hi = 0;
- rxbd->buf_ptr_lo = (u32)rx_buf_pool + i * MAX_RXBUF_LEN;
+ muram_writew(&rxbd->status, RxBD_EMPTY);
+ muram_writew(&rxbd->len, 0);
+ buf_hi = upper_32_bits(virt_to_phys(rx_buf_pool +
+ i * MAX_RXBUF_LEN));
+ buf_lo = lower_32_bits(virt_to_phys(rx_buf_pool +
+ i * MAX_RXBUF_LEN));
+ muram_writew(&rxbd->buf_ptr_hi, (u16)buf_hi);
+ out_be32(&rxbd->buf_ptr_lo, buf_lo);
rxbd++;
}
/* set the Rx queue descriptor */
rxqd = &pram->rxqd;
muram_writew(&rxqd->gen, 0);
- muram_writew(&rxqd->bd_ring_base_hi, 0);
- rxqd->bd_ring_base_lo = (u32)rx_bd_ring_base;
+ bd_ring_base_hi = upper_32_bits(virt_to_phys(rx_bd_ring_base));
+ bd_ring_base_lo = lower_32_bits(virt_to_phys(rx_bd_ring_base));
+ muram_writew(&rxqd->bd_ring_base_hi, (u16)bd_ring_base_hi);
+ out_be32(&rxqd->bd_ring_base_lo, bd_ring_base_lo);
muram_writew(&rxqd->bd_ring_size, sizeof(struct fm_port_bd)
* RX_BD_RING_SIZE);
muram_writew(&rxqd->offset_in, 0);
/* set IM parameter ram pointer to Rx Frame Queue ID */
out_be32(&bmi_rx_port->fmbm_rfqid, pram_page_offset);
- return 1;
+ return 0;
}
static int fm_eth_tx_port_parameter_init(struct fm_eth *fm_eth)
struct fm_port_global_pram *pram;
u32 pram_page_offset;
void *tx_bd_ring_base;
+ u32 bd_ring_base_lo, bd_ring_base_hi;
struct fm_port_bd *txbd;
struct fm_port_qd *txqd;
struct fm_bmi_tx_port *bmi_tx_port = fm_eth->tx_port;
/* alloc global parameter ram at MURAM */
pram = (struct fm_port_global_pram *)fm_muram_alloc(fm_eth->fm_index,
FM_PRAM_SIZE, FM_PRAM_ALIGN);
+ if (!pram) {
+ printf("%s: No muram for Tx global parameter\n", __func__);
+ return -ENOMEM;
+ }
fm_eth->tx_pram = pram;
/* parameter page offset to MURAM */
- pram_page_offset = (u32)pram - fm_muram_base(fm_eth->fm_index);
+ pram_page_offset = (void *)pram - fm_muram_base(fm_eth->fm_index);
/* enable global mode- snooping data buffers and BDs */
- pram->mode = PRAM_MODE_GLOBAL;
+ out_be32(&pram->mode, PRAM_MODE_GLOBAL);
/* init the Tx queue descriptor pionter */
- pram->txqd_ptr = pram_page_offset + 0x40;
+ out_be32(&pram->txqd_ptr, pram_page_offset + 0x40);
/* alloc Tx buffer descriptors from main memory */
tx_bd_ring_base = malloc(sizeof(struct fm_port_bd)
* TX_BD_RING_SIZE);
if (!tx_bd_ring_base)
- return 0;
+ return -ENOMEM;
+
memset(tx_bd_ring_base, 0, sizeof(struct fm_port_bd)
* TX_BD_RING_SIZE);
/* save it to fm_eth */
/* init Tx BDs ring */
txbd = (struct fm_port_bd *)tx_bd_ring_base;
for (i = 0; i < TX_BD_RING_SIZE; i++) {
- txbd->status = TxBD_LAST;
- txbd->len = 0;
- txbd->buf_ptr_hi = 0;
- txbd->buf_ptr_lo = 0;
+ muram_writew(&txbd->status, TxBD_LAST);
+ muram_writew(&txbd->len, 0);
+ muram_writew(&txbd->buf_ptr_hi, 0);
+ out_be32(&txbd->buf_ptr_lo, 0);
+ txbd++;
}
/* set the Tx queue decriptor */
txqd = &pram->txqd;
- muram_writew(&txqd->bd_ring_base_hi, 0);
- txqd->bd_ring_base_lo = (u32)tx_bd_ring_base;
+ bd_ring_base_hi = upper_32_bits(virt_to_phys(tx_bd_ring_base));
+ bd_ring_base_lo = lower_32_bits(virt_to_phys(tx_bd_ring_base));
+ muram_writew(&txqd->bd_ring_base_hi, (u16)bd_ring_base_hi);
+ out_be32(&txqd->bd_ring_base_lo, bd_ring_base_lo);
muram_writew(&txqd->bd_ring_size, sizeof(struct fm_port_bd)
* TX_BD_RING_SIZE);
muram_writew(&txqd->offset_in, 0);
/* set IM parameter ram pointer to Tx Confirmation Frame Queue ID */
out_be32(&bmi_tx_port->fmbm_tcfqid, pram_page_offset);
- return 1;
+ return 0;
}
static int fm_eth_init(struct fm_eth *fm_eth)
{
+ int ret;
- if (!fm_eth_rx_port_parameter_init(fm_eth))
- return 0;
+ ret = fm_eth_rx_port_parameter_init(fm_eth);
+ if (ret)
+ return ret;
- if (!fm_eth_tx_port_parameter_init(fm_eth))
- return 0;
+ ret = fm_eth_tx_port_parameter_init(fm_eth);
+ if (ret)
+ return ret;
- return 1;
+ return 0;
}
static int fm_eth_startup(struct fm_eth *fm_eth)
{
struct fsl_enet_mac *mac;
+ int ret;
+
mac = fm_eth->mac;
/* Rx/TxBDs, Rx/TxQDs, Rx buff and parameter ram init */
- if (!fm_eth_init(fm_eth))
- return 0;
+ ret = fm_eth_init(fm_eth);
+ if (ret)
+ return ret;
/* setup the MAC controller */
mac->init_mac(mac);
/* For some reason we need to set SPEED_100 */
- if ((fm_eth->enet_if == PHY_INTERFACE_MODE_SGMII) && mac->set_if_mode)
+ if (((fm_eth->enet_if == PHY_INTERFACE_MODE_SGMII) ||
+ (fm_eth->enet_if == PHY_INTERFACE_MODE_SGMII_2500) ||
+ (fm_eth->enet_if == PHY_INTERFACE_MODE_QSGMII)) &&
+ mac->set_if_mode)
mac->set_if_mode(mac, fm_eth->enet_if, SPEED_100);
/* init bmi rx port, IM mode and disable */
/* init bmi tx port, IM mode and disable */
bmi_tx_port_init(fm_eth->tx_port);
- return 1;
+ return 0;
}
static void fmc_tx_port_graceful_stop_enable(struct fm_eth *fm_eth)
pram = fm_eth->tx_pram;
/* graceful stop transmission of frames */
- pram->mode |= PRAM_MODE_GRACEFUL_STOP;
+ setbits_be32(&pram->mode, PRAM_MODE_GRACEFUL_STOP);
sync();
}
pram = fm_eth->tx_pram;
/* re-enable transmission of frames */
- pram->mode &= ~PRAM_MODE_GRACEFUL_STOP;
+ clrbits_be32(&pram->mode, PRAM_MODE_GRACEFUL_STOP);
sync();
}
fmc_tx_port_graceful_stop_disable(fm_eth);
#ifdef CONFIG_PHYLIB
- ret = phy_startup(fm_eth->phydev);
- if (ret) {
- printf("%s: Could not initialize\n", fm_eth->phydev->dev->name);
- return ret;
+ if (fm_eth->phydev) {
+ ret = phy_startup(fm_eth->phydev);
+ if (ret) {
+ printf("%s: Could not initialize\n",
+ fm_eth->phydev->dev->name);
+ return ret;
+ }
+ } else {
+ return 0;
}
#else
fm_eth->phydev->speed = SPEED_1000;
/* disable bmi Rx port */
bmi_rx_port_disable(fm_eth->rx_port);
- phy_shutdown(fm_eth->phydev);
+#ifdef CONFIG_PHYLIB
+ if (fm_eth->phydev)
+ phy_shutdown(fm_eth->phydev);
+#endif
}
static int fm_eth_send(struct eth_device *dev, void *buf, int len)
txbd = fm_eth->cur_txbd;
/* find one empty TxBD */
- for (i = 0; txbd->status & TxBD_READY; i++) {
+ for (i = 0; muram_readw(&txbd->status) & TxBD_READY; i++) {
udelay(100);
if (i > 0x1000) {
- printf("%s: Tx buffer not ready\n", dev->name);
+ printf("%s: Tx buffer not ready, txbd->status = 0x%x\n",
+ dev->name, muram_readw(&txbd->status));
return 0;
}
}
/* setup TxBD */
- txbd->buf_ptr_hi = 0;
- txbd->buf_ptr_lo = (u32)buf;
- txbd->len = len;
+ muram_writew(&txbd->buf_ptr_hi, (u16)upper_32_bits(virt_to_phys(buf)));
+ out_be32(&txbd->buf_ptr_lo, lower_32_bits(virt_to_phys(buf)));
+ muram_writew(&txbd->len, len);
sync();
- txbd->status = TxBD_READY | TxBD_LAST;
+ muram_writew(&txbd->status, TxBD_READY | TxBD_LAST);
sync();
/* update TxQD, let RISC to send the packet */
sync();
/* wait for buffer to be transmitted */
- for (i = 0; txbd->status & TxBD_READY; i++) {
+ for (i = 0; muram_readw(&txbd->status) & TxBD_READY; i++) {
udelay(100);
if (i > 0x10000) {
- printf("%s: Tx error\n", dev->name);
+ printf("%s: Tx error, txbd->status = 0x%x\n",
+ dev->name, muram_readw(&txbd->status));
return 0;
}
}
struct fm_port_global_pram *pram;
struct fm_port_bd *rxbd, *rxbd_base;
u16 status, len;
+ u32 buf_lo, buf_hi;
u8 *data;
u16 offset_out;
+ int ret = 1;
fm_eth = (struct fm_eth *)dev->priv;
pram = fm_eth->rx_pram;
rxbd = fm_eth->cur_rxbd;
- status = rxbd->status;
+ status = muram_readw(&rxbd->status);
while (!(status & RxBD_EMPTY)) {
if (!(status & RxBD_ERROR)) {
- data = (u8 *)rxbd->buf_ptr_lo;
- len = rxbd->len;
- NetReceive(data, len);
+ buf_hi = muram_readw(&rxbd->buf_ptr_hi);
+ buf_lo = in_be32(&rxbd->buf_ptr_lo);
+ data = (u8 *)((ulong)(buf_hi << 16) << 16 | buf_lo);
+ len = muram_readw(&rxbd->len);
+ net_process_received_packet(data, len);
} else {
printf("%s: Rx error\n", dev->name);
- return 0;
+ ret = 0;
}
/* clear the RxBDs */
- rxbd->status = RxBD_EMPTY;
- rxbd->len = 0;
+ muram_writew(&rxbd->status, RxBD_EMPTY);
+ muram_writew(&rxbd->len, 0);
sync();
/* advance RxBD */
if (rxbd >= (rxbd_base + RX_BD_RING_SIZE))
rxbd = rxbd_base;
/* read next status */
- status = rxbd->status;
+ status = muram_readw(&rxbd->status);
/* update RxQD */
offset_out = muram_readw(&pram->rxqd.offset_out);
}
fm_eth->cur_rxbd = (void *)rxbd;
- return 1;
+ return ret;
}
static int fm_eth_init_mac(struct fm_eth *fm_eth, struct ccsr_fman *reg)
num = fm_eth->num;
#ifdef CONFIG_SYS_FMAN_V3
+#ifndef CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
+ if (fm_eth->type == FM_ETH_10G_E) {
+ /* 10GEC1/10GEC2 use mEMAC9/mEMAC10 on T2080/T4240.
+ * 10GEC3/10GEC4 use mEMAC1/mEMAC2 on T2080.
+ * 10GEC1 uses mEMAC1 on T1024.
+ * so it needs to change the num.
+ */
+ if (fm_eth->num >= 2)
+ num -= 2;
+ else
+ num += 8;
+ }
+#endif
base = ®->memac[num].fm_memac;
phyregs = ®->memac[num].fm_memac_mdio;
#else
/* alloc mac controller */
mac = malloc(sizeof(struct fsl_enet_mac));
if (!mac)
- return 0;
+ return -ENOMEM;
memset(mac, 0, sizeof(struct fsl_enet_mac));
/* save the mac to fm_eth struct */
init_tgec(mac, base, phyregs, MAX_RXBUF_LEN);
#endif
- return 1;
+ return 0;
}
static int init_phy(struct eth_device *dev)
{
struct fm_eth *fm_eth = dev->priv;
+#ifdef CONFIG_PHYLIB
struct phy_device *phydev = NULL;
u32 supported;
+#endif
-#ifdef CONFIG_PHYLIB
if (fm_eth->type == FM_ETH_1G_E)
dtsec_init_phy(dev);
+#ifdef CONFIG_PHYLIB
if (fm_eth->bus) {
phydev = phy_connect(fm_eth->bus, fm_eth->phyaddr, dev,
fm_eth->enet_if);
- }
-
- if (!phydev) {
- printf("Failed to connect\n");
- return -1;
+ if (!phydev) {
+ printf("Failed to connect\n");
+ return -1;
+ }
+ } else {
+ return 0;
}
if (fm_eth->type == FM_ETH_1G_E) {
struct eth_device *dev;
struct fm_eth *fm_eth;
int i, num = info->num;
+ int ret;
/* alloc eth device */
dev = (struct eth_device *)malloc(sizeof(struct eth_device));
if (!dev)
- return 0;
+ return -ENOMEM;
memset(dev, 0, sizeof(struct eth_device));
/* alloc the FMan ethernet private struct */
fm_eth = (struct fm_eth *)malloc(sizeof(struct fm_eth));
if (!fm_eth)
- return 0;
+ return -ENOMEM;
memset(fm_eth, 0, sizeof(struct fm_eth));
/* save off some things we need from the info struct */
fm_eth->max_rx_len = MAX_RXBUF_LEN;
/* init global mac structure */
- if (!fm_eth_init_mac(fm_eth, reg))
- return 0;
+ ret = fm_eth_init_mac(fm_eth, reg);
+ if (ret)
+ return ret;
/* keep same as the manual, we call FMAN1, FMAN2, DTSEC1, DTSEC2, etc */
if (fm_eth->type == FM_ETH_1G_E)
fm_eth->enet_if = info->enet_if;
/* startup the FM im */
- if (!fm_eth_startup(fm_eth))
- return 0;
+ ret = fm_eth_startup(fm_eth);
+ if (ret)
+ return ret;
- if (init_phy(dev))
- return 0;
+ init_phy(dev);
/* clear the ethernet address */
for (i = 0; i < 6; i++)
dev->enetaddr[i] = 0;
eth_register(dev);
- return 1;
+ return 0;
}
projects / u-boot / blobdiff