]> git.sur5r.net Git - u-boot/blobdiff - drivers/net/inca-ip_sw.c
net: Fix remaining API interface breakage
[u-boot] / drivers / net / inca-ip_sw.c
index d852a150fa913a4dfb8c478f94ce500a6a0f386e..f0f62deaf8e0d0e95dd0c4682c58c70823100e8e 100644 (file)
@@ -28,6 +28,7 @@
 
 #include <malloc.h>
 #include <net.h>
+#include <netdev.h>
 #include <asm/inca-ip.h>
 #include <asm/addrspace.h>
 
@@ -157,7 +158,7 @@ static int initialized      = 0;
 
 
 static int inca_switch_init(struct eth_device *dev, bd_t * bis);
-static int inca_switch_send(struct eth_device *dev, volatile void *packet, int length);
+static int inca_switch_send(struct eth_device *dev, void *packet, int length);
 static int inca_switch_recv(struct eth_device *dev);
 static void inca_switch_halt(struct eth_device *dev);
 static void inca_init_switch_chip(void);
@@ -199,7 +200,7 @@ int inca_switch_initialize(bd_t * bis)
        printf("Leaving inca_switch_initialize()\n");
 #endif
 
-       return 1;
+       return 0;
 }
 
 
@@ -290,9 +291,7 @@ static int inca_switch_init(struct eth_device *dev, bd_t * bis)
        /* Initialize RxDMA.
         */
        DMA_READ_REG(INCA_IP_DMA_DMA_RXISR, v);
-#if 0
-       printf("RX status = 0x%08X\n", v);
-#endif
+       debug("RX status = 0x%08X\n", v);
 
        /* Writing to the FRDA of CHANNEL.
         */
@@ -305,9 +304,7 @@ static int inca_switch_init(struct eth_device *dev, bd_t * bis)
        /* Initialize TxDMA.
         */
        DMA_READ_REG(INCA_IP_DMA_DMA_TXISR, v);
-#if 0
-       printf("TX status = 0x%08X\n", v);
-#endif
+       debug("TX status = 0x%08X\n", v);
 
        /* Writing to the FRDA of CHANNEL.
         */
@@ -337,7 +334,7 @@ static int inca_switch_init(struct eth_device *dev, bd_t * bis)
 }
 
 
-static int inca_switch_send(struct eth_device *dev, volatile void *packet, int length)
+static int inca_switch_send(struct eth_device *dev, void *packet, int length)
 {
        int                    i;
        int                    res      = -1;
@@ -755,7 +752,7 @@ static int inca_amdix(void)
                                        (0x1 << 31) |   /* RA           */
                                        (0x0 << 30) |   /* Read         */
                                        (0x6 << 21) |   /* LAN          */
-                                       (6   << 16));   /* PHY_ANER     */
+                                       (6   << 16));   /* MII_EXPANSION        */
                                do {
                                        SW_READ_REG(INCA_IP_Switch_MDIO_ACC, phyReg6);
                                } while (phyReg6 & (1 << 31));
@@ -768,7 +765,7 @@ static int inca_amdix(void)
                                                (0x1 << 31) |   /* RA           */
                                                (0x0 << 30) |   /* Read         */
                                                (0x6 << 21) |   /* LAN          */
-                                               (4   << 16));   /* PHY_ANAR     */
+                                               (4   << 16));   /* MII_ADVERTISE        */
                                        do {
                                                SW_READ_REG(INCA_IP_Switch_MDIO_ACC, phyReg4);
                                        } while (phyReg4 & (1 << 31));
@@ -781,7 +778,7 @@ static int inca_amdix(void)
                                                        (0x1 << 31) |   /* RA           */
                                                        (0x0 << 30) |   /* Read         */
                                                        (0x6 << 21) |   /* LAN          */
-                                                       (5   << 16));   /* PHY_ANLPAR   */
+                                                       (5   << 16));   /* MII_LPA      */
                                                do {
                                                        SW_READ_REG(INCA_IP_Switch_MDIO_ACC, phyReg5);
                                                } while (phyReg5 & (1 << 31));