sf: add paired dev info for winbond w25q16jv

[u-boot] / drivers / net / mvgbe.c

diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c
index a1c7ea054c16d2b2cb9c0a8367ceed8cc616b529..e6585ef8b3e72643d45bdfbaa87bd3c959f15721 100644 (file)
--- a/drivers/net/mvgbe.c
+++ b/drivers/net/mvgbe.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2009
  * Marvell Semiconductor <www.marvell.com>
@@ -8,16 +9,15 @@
  *
  * based on - Driver for MV64360X ethernet ports
  * Copyright (C) 2002 rabeeh@galileo.co.il
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #include <net.h>
 #include <malloc.h>
 #include <miiphy.h>
+#include <wait_bit.h>
 #include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
 #include <asm/types.h>
 #include <asm/system.h>
 #include <asm/byteorder.h>
@@ -27,8 +27,6 @@
 #include <asm/arch/soc.h>
 #elif defined(CONFIG_ORION5X)
 #include <asm/arch/orion5x.h>
-#elif defined(CONFIG_DOVE)
-#include <asm/arch/dove.h>
 #endif
 
 #include "mvgbe.h"
@@ -43,10 +41,24 @@ DECLARE_GLOBAL_DATA_PTR;
 #define MVGBE_SMI_REG (((struct mvgbe_registers *)MVGBE0_BASE)->smi)
 
 #if defined(CONFIG_PHYLIB) || defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
+static int smi_wait_ready(struct mvgbe_device *dmvgbe)
+{
+       int ret;
+
+       ret = wait_for_bit_le32(&MVGBE_SMI_REG, MVGBE_PHY_SMI_BUSY_MASK, false,
+                               MVGBE_PHY_SMI_TIMEOUT_MS, false);
+       if (ret) {
+               printf("Error: SMI busy timeout\n");
+               return ret;
+       }
+
+       return 0;
+}
+
 /*
  * smi_reg_read - miiphy_read callback function.
  *
- * Returns 16bit phy register value, or 0xffff on error
+ * Returns 16bit phy register value, or -EFAULT on error
  */
 static int smi_reg_read(struct mii_dev *bus, int phy_adr, int devad,
                        int reg_ofs)
@@ -77,16 +89,9 @@ static int smi_reg_read(struct mii_dev *bus, int phy_adr, int devad,
                return -EFAULT;
        }
 
-       timeout = MVGBE_PHY_SMI_TIMEOUT;
        /* wait till the SMI is not busy */
-       do {
-               /* read smi register */
-               smi_reg = MVGBE_REG_RD(MVGBE_SMI_REG);
-               if (timeout-- == 0) {
-                       printf("Err..(%s) SMI busy timeout\n", __func__);
-                       return -EFAULT;
-               }
-       } while (smi_reg & MVGBE_PHY_SMI_BUSY_MASK);
+       if (smi_wait_ready(dmvgbe) < 0)
+               return -EFAULT;
 
        /* fill the phy address and regiser offset and read opcode */
        smi_reg = (phy_adr << MVGBE_PHY_SMI_DEV_ADDR_OFFS)
@@ -122,10 +127,9 @@ static int smi_reg_read(struct mii_dev *bus, int phy_adr, int devad,
 }
 
 /*
- * smi_reg_write - imiiphy_write callback function.
+ * smi_reg_write - miiphy_write callback function.
  *
- * Returns 0 if write succeed, -EINVAL on bad parameters
- * -ETIME on timeout
+ * Returns 0 if write succeed, -EFAULT on error
  */
 static int smi_reg_write(struct mii_dev *bus, int phy_adr, int devad,
                         int reg_ofs, u16 data)
@@ -134,7 +138,6 @@ static int smi_reg_write(struct mii_dev *bus, int phy_adr, int devad,
        struct mvgbe_device *dmvgbe = to_mvgbe(dev);
        struct mvgbe_registers *regs = dmvgbe->regs;
        u32 smi_reg;
-       u32 timeout;
 
        /* Phyadr write request*/
        if (phy_adr == MV_PHY_ADR_REQUEST &&
@@ -150,19 +153,12 @@ static int smi_reg_write(struct mii_dev *bus, int phy_adr, int devad,
        }
        if (reg_ofs > PHYREG_MASK) {
                printf("Err..(%s) Invalid register offset\n", __func__);
-               return -EINVAL;
+               return -EFAULT;
        }
 
        /* wait till the SMI is not busy */
-       timeout = MVGBE_PHY_SMI_TIMEOUT;
-       do {
-               /* read smi register */
-               smi_reg = MVGBE_REG_RD(MVGBE_SMI_REG);
-               if (timeout-- == 0) {
-                       printf("Err..(%s) SMI busy timeout\n", __func__);
-                       return -ETIME;
-               }
-       } while (smi_reg & MVGBE_PHY_SMI_BUSY_MASK);
+       if (smi_wait_ready(dmvgbe) < 0)
+               return -EFAULT;
 
        /* fill the phy addr and reg offset and write opcode and data */
        smi_reg = (data << MVGBE_PHY_SMI_DATA_OFFS);
@@ -177,25 +173,6 @@ static int smi_reg_write(struct mii_dev *bus, int phy_adr, int devad,
 }
 #endif
 
-#if defined(CONFIG_PHYLIB)
-int mvgbe_phy_read(struct mii_dev *bus, int phy_addr, int dev_addr,
-                  int reg_addr)
-{
-       u16 data;
-       int ret;
-       ret = smi_reg_read(bus->name, phy_addr, reg_addr, &data);
-       if (ret)
-               return ret;
-       return data;
-}
-
-int mvgbe_phy_write(struct mii_dev *bus, int phy_addr, int dev_addr,
-                   int reg_addr, u16 data)
-{
-       return smi_reg_write(bus->name, phy_addr, reg_addr, data);
-}
-#endif
-
 /* Stop and checks all queues */
 static void stop_queue(u32 * qreg)
 {
@@ -676,8 +653,8 @@ int mvgbe_phylib_init(struct eth_device *dev, int phyid)
                printf("mdio_alloc failed\n");
                return -ENOMEM;
        }
-       bus->read = mvgbe_phy_read;
-       bus->write = mvgbe_phy_write;
+       bus->read = smi_reg_read;
+       bus->write = smi_reg_write;
        strcpy(bus->name, dev->name);
 
        ret = mdio_register(bus);
@@ -688,7 +665,7 @@ int mvgbe_phylib_init(struct eth_device *dev, int phyid)
        }
 
        /* Set phy address of the port */
-       mvgbe_phy_write(bus, MV_PHY_ADR_REQUEST, 0, MV_PHY_ADR_REQUEST, phyid);
+       smi_reg_write(bus, MV_PHY_ADR_REQUEST, 0, MV_PHY_ADR_REQUEST, phyid);
 
        phydev = phy_connect(bus, phyid, dev, PHY_INTERFACE_MODE_RGMII);
        if (!phydev) {