#include <common.h>
-
-#ifdef CONFIG_DRIVER_NETARMETH
#include <command.h>
#include <net.h>
#include "netarm_eth.h"
#include <asm/arch/netarm_registers.h>
-
-#if defined(CONFIG_CMD_NET)
-
static int na_mii_poll_busy (void);
static void na_get_mac_addr (void)
setenv ("ethaddr", ethaddr);
}
-
static void na_mii_write (int reg, int value)
{
int mii_addr;
/* Select register */
- mii_addr = CFG_ETH_PHY_ADDR + reg;
+ mii_addr = CONFIG_SYS_ETH_PHY_ADDR + reg;
SET_EADDR (NETARM_ETH_MII_ADDR, mii_addr);
/* Write value */
SET_EADDR (NETARM_ETH_MII_WRITE, value);
int mii_addr, val;
/* Select register */
- mii_addr = CFG_ETH_PHY_ADDR + reg;
+ mii_addr = CONFIG_SYS_ETH_PHY_ADDR + reg;
SET_EADDR (NETARM_ETH_MII_ADDR, mii_addr);
/* do one management cycle */
SET_EADDR (NETARM_ETH_MII_CMD,
static int na_mii_poll_busy (void)
{
+ ulong start;
/* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
- while (get_timer_masked () < NA_MII_POLL_BUSY_DELAY) {
+ start = get_timer(0));
+ while (get_timer(start) < NA_MII_POLL_BUSY_DELAY) {
if (!(GET_EADDR (NETARM_ETH_MII_IND) & NETARM_ETH_MIII_BUSY)) {
return 1;
}
static int reset_eth (void)
{
int pt;
+ ulong start;
na_get_mac_addr ();
pt = na_mii_identify_phy ();
/* reset the phy */
na_mii_write (MII_PHY_CONTROL, 0x8000);
- reset_timer_masked ();
- while (get_timer_masked () < NA_MII_NEGOTIATE_DELAY) {
+ start = get_timer(0);
+ while (get_timer(start) < NA_MII_NEGOTIATE_DELAY) {
if ((na_mii_read (MII_PHY_STATUS) & 0x8000) == 0) {
break;
}
}
- if (get_timer_masked () >= NA_MII_NEGOTIATE_DELAY)
+ if (get_timer(start) >= NA_MII_NEGOTIATE_DELAY)
printf ("phy reset timeout\n");
/* set the PCS reg */
printf ("eth_send timeout\n");
return 1;
}
-
-#endif /* COMMANDS & CFG_NET */
-
-#endif /* CONFIG_DRIVER_NETARMETH */