net: dc2114x: Add initialized eth_device structure

[u-boot] / drivers / net / phy / mv88e61xx.c

diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c
index ec47286ddde0e1a49c23bb309d5d536d9204073f..2d1de0291700424fa62df72638b2d18a89baec09 100644 (file)
--- a/drivers/net/phy/mv88e61xx.c
+++ b/drivers/net/phy/mv88e61xx.c
@@ -36,9 +36,9 @@
  * By default single chip mode is configured
  * multichip mode operation can be configured in board header
  */
-static int mv88e61xx_busychk_multic(u32 devaddr)
+static int mv88e61xx_busychk_multic(char *name, u32 devaddr)
 {
-       u32 reg = 0;
+       u16 reg = 0;
        u32 timeout = MV88E61XX_PHY_TIMEOUT;
 
        /* Poll till SMIBusy bit is clear */
@@ -54,15 +54,14 @@ static int mv88e61xx_busychk_multic(u32 devaddr)
 
 static void mv88e61xx_wr_phy(char *name, u32 phy_adr, u32 reg_ofs, u16 data)
 {
-       u16 reg;
-       u32 mii_dev_addr;
+       u16 mii_dev_addr;
 
        /* command to read PHY dev address */
-       if (!miiphy_read(name, 0xEE, 0xEE, &mii_dev_addr)) {
+       if (miiphy_read(name, 0xEE, 0xEE, &mii_dev_addr)) {
                printf("Error..could not read PHY dev address\n");
                return;
        }
-       mv88e61xx_busychk_multic(mii_dev_addr);
+       mv88e61xx_busychk_multic(name, mii_dev_addr);
        /* Write data to Switch indirect data register */
        miiphy_write(name, mii_dev_addr, 0x1, data);
        /* Write command to Switch indirect command register (write) */
@@ -73,22 +72,21 @@ static void mv88e61xx_wr_phy(char *name, u32 phy_adr, u32 reg_ofs, u16 data)
 
 static void mv88e61xx_rd_phy(char *name, u32 phy_adr, u32 reg_ofs, u16 * data)
 {
-       u16 reg;
-       u32 mii_dev_addr;
+       u16 mii_dev_addr;
 
        /* command to read PHY dev address */
-       if (!miiphy_read(name, 0xEE, 0xEE, &mii_dev_addr)) {
+       if (miiphy_read(name, 0xEE, 0xEE, &mii_dev_addr)) {
                printf("Error..could not read PHY dev address\n");
                return;
        }
-       mv88e61xx_busychk_multic(mii_dev_addr);
+       mv88e61xx_busychk_multic(name, mii_dev_addr);
        /* Write command to Switch indirect command register (read) */
        miiphy_write(name, mii_dev_addr, 0x0,
-                    reg_ofs | (phy_adr << 5) | (1 << 10) | (1 << 12) | (1 <<
+                    reg_ofs | (phy_adr << 5) | (1 << 11) | (1 << 12) | (1 <<
                                                                         15));
-       mv88e61xx_busychk_multic(mii_dev_addr);
+       mv88e61xx_busychk_multic(name, mii_dev_addr);
        /* Read data from Switch indirect data register */
-       miiphy_read(name, mii_dev_addr, 0x1, (u16 *) & data);
+       miiphy_read(name, mii_dev_addr, 0x1, data);
 }
 #endif /* CONFIG_MV88E61XX_MULTICHIP_ADRMODE */
 
@@ -203,16 +201,16 @@ static void mv88e61xx_port_vlan_config(struct mv88e61xx_config *swconfig,
  */
 static int mv88e61xx_busychk(char *name)
 {
-       u32 reg = 0;
+       u16 reg = 0;
        u32 timeout = MV88E61XX_PHY_TIMEOUT;
        do {
                RD_PHY(name, MV88E61XX_GLB2REG_DEVADR,
-                      MV88E61XX_PHY_CMD, (u16 *) & reg);
+                      MV88E61XX_PHY_CMD, &reg);
                if (timeout-- == 0) {
                        printf("SMI busy timeout\n");
                        return -1;
                }
-       } while (reg & 1 << 28);        /* busy mask */
+       } while (reg & 1 << 15);        /* busy mask */
        return 0;
 }
 
@@ -357,15 +355,22 @@ int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig)
        }
 
        RD_PHY(name, MV88E61XX_PRT_OFST, PHY_PHYIDR2, &reg);
-       reg &= 0xfff0;
-       if (reg == 0x1610)
+       switch (reg &= 0xfff0) {
+       case 0x1610:
                idstr = "88E6161";
-       if (reg == 0x1650)
+               break;
+       case 0x1650:
                idstr = "88E6165";
-       if (reg == 0x1210) {
+               break;
+       case 0x1210:
                idstr = "88E6123";
                /* ports 2,3,4 not available */
                swconfig->ports_enabled &= 0x023;
+               break;
+       default:
+               /* Could not detect switch id */
+               idstr = "88E61??";
+               break;
        }
 
        /* Port based VLANs configuration */