net: zynq_gem: Calculate clock dividers dynamically

[u-boot] / drivers / net / phy / phy.c

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index effe3e3d5d33dedc5a562fc88c41916b0f1f56fc..c691fbbbc61b6e15cb97e3ef85e7cd47fd6f1edf 100644 (file)
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -1,21 +1,7 @@
 /*
  * Generic PHY Management code
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
+ * SPDX-License-Identifier:    GPL-2.0+
  *
  * Copyright 2011 Freescale Semiconductor, Inc.
  * author Andy Fleming
@@ -289,17 +275,22 @@ int genphy_parse_link(struct phy_device *phydev)
        int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
 
        /* We're using autonegotiation */
-       if (mii_reg & BMSR_ANEGCAPABLE) {
+       if (phydev->supported & SUPPORTED_Autoneg) {
                u32 lpa = 0;
-               u32 gblpa = 0;
+               int gblpa = 0;
                u32 estatus = 0;
 
                /* Check for gigabit capability */
-               if (mii_reg & BMSR_ERCAP) {
+               if (phydev->supported & (SUPPORTED_1000baseT_Full |
+                                       SUPPORTED_1000baseT_Half)) {
                        /* We want a list of states supported by
                         * both PHYs in the link
                         */
                        gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
+                       if (gblpa < 0) {
+                               debug("Could not read MII_STAT1000. Ignoring gigabit capability\n");
+                               gblpa = 0;
+                       }
                        gblpa &= phy_read(phydev,
                                        MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
                }