rockchip: mkimage: remove (left-over) assignment w/o effect [coverity]

[u-boot] / drivers / net / sh_eth.h

diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index dc93028162efef8863ebe07c4ca7bfd344c74ffe..3645f0eca7c42755d069c9745faa0eea703e28ea 100644 (file)
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -1,5 +1,5 @@
 /*
- * sh_eth.h - Driver for Renesas SuperH ethernet controler.
+ * sh_eth.h - Driver for Renesas SuperH ethernet controller.
  *
  * Copyright (C) 2008 - 2012 Renesas Solutions Corp.
  * Copyright (c) 2008 - 2012 Nobuhiro Iwamatsu
@@ -51,8 +51,6 @@
 /* The size of the tx descriptor is determined by how much padding is used.
    4, 20, or 52 bytes of padding can be used */
 #define TX_DESC_PADDING        (CONFIG_SH_ETHER_ALIGNE_SIZE - 12)
-/* same as CONFIG_SH_ETHER_ALIGNE_SIZE */
-#define TX_DESC_SIZE   (12 + TX_DESC_PADDING)
 
 /* Tx descriptor. We always use 3 bytes of padding */
 struct tx_desc_s {
@@ -68,8 +66,6 @@ struct tx_desc_s {
 /* The size of the rx descriptor is determined by how much padding is used.
    4, 20, or 52 bytes of padding can be used */
 #define RX_DESC_PADDING        (CONFIG_SH_ETHER_ALIGNE_SIZE - 12)
-/* same as CONFIG_SH_ETHER_ALIGNE_SIZE */
-#define RX_DESC_SIZE           (12 + RX_DESC_PADDING)
 /* aligned cache line size */
 #define RX_BUF_ALIGNE_SIZE     (CONFIG_SH_ETHER_ALIGNE_SIZE > 32 ? 64 : 32)
 
@@ -82,13 +78,13 @@ struct rx_desc_s {
 };
 
 struct sh_eth_info {
-       struct tx_desc_s *tx_desc_malloc;
+       struct tx_desc_s *tx_desc_alloc;
        struct tx_desc_s *tx_desc_base;
        struct tx_desc_s *tx_desc_cur;
-       struct rx_desc_s *rx_desc_malloc;
+       struct rx_desc_s *rx_desc_alloc;
        struct rx_desc_s *rx_desc_base;
        struct rx_desc_s *rx_desc_cur;
-       u8 *rx_buf_malloc;
+       u8 *rx_buf_alloc;
        u8 *rx_buf_base;
        u8 mac_addr[6];
        u8 phy_addr;