spi: xilinx: Read reg base address from DTS file

[u-boot] / drivers / net / sh_eth.h

diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index a8339ebf332d0405ec11f49095b0db34be241bdc..cd8190062a6b195eb5c65e94eb44bb7d17a2eb5a 100644 (file)
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -1,11 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * sh_eth.h - Driver for Renesas SuperH ethernet controller.
  *
  * Copyright (C) 2008 - 2012 Renesas Solutions Corp.
  * Copyright (c) 2008 - 2012 Nobuhiro Iwamatsu
  * Copyright (c) 2007 Carlos Munoz <carlos@kenati.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <netdev.h>
@@ -92,6 +91,7 @@ struct sh_eth_info {
        u8 phy_addr;
        struct eth_device *dev;
        struct phy_device *phydev;
+       void __iomem *iobase;
 };
 
 struct sh_eth_dev {
@@ -301,8 +301,7 @@ static const u16 sh_eth_offset_fast_sh4[SH_ETH_MAX_REGISTER_OFFSET] = {
 #elif defined(CONFIG_R8A7740)
 #define SH_ETH_TYPE_GETHER
 #define BASE_IO_ADDR   0xE9A00000
-#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \
-       defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794)
+#elif defined(CONFIG_RCAR_GEN2)
 #define SH_ETH_TYPE_ETHER
 #define BASE_IO_ADDR   0xEE700200
 #elif defined(CONFIG_R7S72100)
@@ -513,8 +512,7 @@ enum FELIC_MODE_BIT {
        ECMR_PRM = 0x00000001,
 #ifdef CONFIG_CPU_SH7724
        ECMR_RTM = 0x00000010,
-#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \
-       defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794)
+#elif defined(CONFIG_RCAR_GEN2)
        ECMR_RTM = 0x00000004,
 #endif
 
@@ -601,7 +599,7 @@ enum FIFO_SIZE_BIT {
        FIFO_SIZE_T = 0x00000700, FIFO_SIZE_R = 0x00000007,
 };
 
-static inline unsigned long sh_eth_reg_addr(struct sh_eth_dev *eth,
+static inline unsigned long sh_eth_reg_addr(struct sh_eth_info *port,
                                            int enum_index)
 {
 #if defined(SH_ETH_TYPE_GETHER) || defined(SH_ETH_TYPE_RZ)
@@ -611,17 +609,17 @@ static inline unsigned long sh_eth_reg_addr(struct sh_eth_dev *eth,
 #else
 #error
 #endif
-       return BASE_IO_ADDR + reg_offset[enum_index] + 0x800 * eth->port;
+       return (unsigned long)port->iobase + reg_offset[enum_index];
 }
 
-static inline void sh_eth_write(struct sh_eth_dev *eth, unsigned long data,
+static inline void sh_eth_write(struct sh_eth_info *port, unsigned long data,
                                int enum_index)
 {
-       outl(data, sh_eth_reg_addr(eth, enum_index));
+       outl(data, sh_eth_reg_addr(port, enum_index));
 }
 
-static inline unsigned long sh_eth_read(struct sh_eth_dev *eth,
+static inline unsigned long sh_eth_read(struct sh_eth_info *port,
                                        int enum_index)
 {
-       return inl(sh_eth_reg_addr(eth, enum_index));
+       return inl(sh_eth_reg_addr(port, enum_index));
 }