startup_tsec(dev);
/* If there's no link, fail */
- return priv->link;
+ return (priv->link ? 0 : -1);
}
* It will wait for the write to be done (or for a timeout to
* expire) before exiting
*/
-void write_phy_reg(struct tsec_private *priv, uint regnum, uint value)
+void write_any_phy_reg(struct tsec_private *priv, uint phyid, uint regnum, uint value)
{
volatile tsec_t *regbase = priv->phyregs;
- uint phyid = priv->phyaddr;
int timeout = 1000000;
regbase->miimadd = (phyid << 8) | regnum;
while ((regbase->miimind & MIIMIND_BUSY) && timeout--) ;
}
+/* #define to provide old write_phy_reg functionality without duplicating code */
+#define write_phy_reg(priv, regnum, value) write_any_phy_reg(priv,priv->phyaddr,regnum,value)
+
/* Reads register regnum on the device's PHY through the
* registers specified in priv. It lowers and raises the read
* command, and waits for the data to become valid (miimind
* notvalid bit cleared), and the bus to cease activity (miimind
* busy bit cleared), and then returns the value
*/
-uint read_phy_reg(struct tsec_private *priv, uint regnum)
+uint read_any_phy_reg(struct tsec_private *priv, uint phyid, uint regnum)
{
uint value;
volatile tsec_t *regbase = priv->phyregs;
- uint phyid = priv->phyaddr;
/* Put the address of the phy, and the register
* number into MIIMADD */
return value;
}
+/* #define to provide old read_phy_reg functionality without duplicating code */
+#define read_phy_reg(priv,regnum) read_any_phy_reg(priv,priv->phyaddr,regnum)
+
/* Discover which PHY is attached to the device, and configure it
* properly. If the PHY is not recognized, then return 0
* (failure). Otherwise, return 1
return 0;
}
+/* Parse the RTL8211B's status register for speed and duplex
+ * information
+ */
+uint mii_parse_RTL8211B_sr(uint mii_reg, struct tsec_private * priv)
+{
+ uint speed;
+
+ mii_reg = read_phy_reg(priv, MIIM_RTL8211B_PHY_STATUS);
+ if (!(mii_reg & MIIM_RTL8211B_PHYSTAT_SPDDONE)) {
+ int i = 0;
+
+ /* in case of timeout ->link is cleared */
+ priv->link = 1;
+ puts("Waiting for PHY realtime link");
+ while (!(mii_reg & MIIM_RTL8211B_PHYSTAT_SPDDONE)) {
+ /* Timeout reached ? */
+ if (i > PHY_AUTONEGOTIATE_TIMEOUT) {
+ puts(" TIMEOUT !\n");
+ priv->link = 0;
+ break;
+ }
+
+ if ((i++ % 1000) == 0) {
+ putc('.');
+ }
+ udelay(1000); /* 1 ms */
+ mii_reg = read_phy_reg(priv, MIIM_RTL8211B_PHY_STATUS);
+ }
+ puts(" done\n");
+ udelay(500000); /* another 500 ms (results in faster booting) */
+ } else {
+ if (mii_reg & MIIM_RTL8211B_PHYSTAT_LINK)
+ priv->link = 1;
+ else
+ priv->link = 0;
+ }
+
+ if (mii_reg & MIIM_RTL8211B_PHYSTAT_DUPLEX)
+ priv->duplexity = 1;
+ else
+ priv->duplexity = 0;
+
+ speed = (mii_reg & MIIM_RTL8211B_PHYSTAT_SPEED);
+
+ switch (speed) {
+ case MIIM_RTL8211B_PHYSTAT_GBIT:
+ priv->speed = 1000;
+ break;
+ case MIIM_RTL8211B_PHYSTAT_100:
+ priv->speed = 100;
+ break;
+ default:
+ priv->speed = 10;
+ }
+
+ return 0;
+}
+
/* Parse the cis8201's status register for speed and duplex
* information
*/
return MIIM_CIS8204_EPHYCON_INIT;
}
+uint mii_m88e1111s_setmode(uint mii_reg, struct tsec_private *priv)
+{
+ uint mii_data = read_phy_reg(priv, mii_reg);
+
+ if (priv->flags & TSEC_REDUCED)
+ mii_data = (mii_data & 0xfff0) | 0x000b;
+ return mii_data;
+}
+
/* Initialized required registers to appropriate values, zeroing
* those we don't care about (unless zero is bad, in which case,
* choose a more appropriate value)
(struct phy_cmd[]){ /* config */
/* Reset and configure the PHY */
{MIIM_CONTROL, MIIM_CONTROL_RESET, NULL},
+ {0x1b, 0x848f, &mii_m88e1111s_setmode},
{0x14, 0x0cd2, NULL}, /* Delay RGMII TX and RX */
{MIIM_GBIT_CONTROL, MIIM_GBIT_CONTROL_INIT, NULL},
{MIIM_ANAR, MIIM_ANAR_INIT, NULL},
},
};
+struct phy_info phy_info_VSC8601 = {
+ 0x00007042,
+ "Vitesse VSC8601",
+ 4,
+ (struct phy_cmd[]){ /* config */
+ /* Override PHY config settings */
+ /* Configure some basic stuff */
+ {MIIM_CONTROL, MIIM_CONTROL_INIT, &mii_cr_init},
+#ifdef CFG_VSC8601_SKEWFIX
+ {MIIM_VSC8601_EPHY_CON,MIIM_VSC8601_EPHY_CON_INIT_SKEW,NULL},
+#if defined(CFG_VSC8601_SKEW_TX) && defined(CFG_VSC8601_SKEW_RX)
+ {MIIM_EXT_PAGE_ACCESS,1,NULL},
+#define VSC8101_SKEW (CFG_VSC8601_SKEW_TX<<14)|(CFG_VSC8601_SKEW_RX<<12)
+ {MIIM_VSC8601_SKEW_CTRL,VSC8101_SKEW,NULL},
+ {MIIM_EXT_PAGE_ACCESS,0,NULL},
+#endif
+#endif
+ {miim_end,}
+ },
+ (struct phy_cmd[]){ /* startup */
+ /* Read the Status (2x to make sure link is right) */
+ {MIIM_STATUS, miim_read, NULL},
+ /* Auto-negotiate */
+ {MIIM_STATUS, miim_read, &mii_parse_sr},
+ /* Read the status */
+ {MIIM_VSC8244_AUX_CONSTAT, miim_read,
+ &mii_parse_vsc8244},
+ {miim_end,}
+ },
+ (struct phy_cmd[]){ /* shutdown */
+ {miim_end,}
+ },
+};
+
+
struct phy_info phy_info_dm9161 = {
0x0181b88,
"Davicom DM9161E",
},
};
+struct phy_info phy_info_rtl8211b = {
+ 0x001cc91,
+ "RealTek RTL8211B",
+ 4,
+ (struct phy_cmd[]){ /* config */
+ /* Reset and configure the PHY */
+ {MIIM_CONTROL, MIIM_CONTROL_RESET, NULL},
+ {MIIM_GBIT_CONTROL, MIIM_GBIT_CONTROL_INIT, NULL},
+ {MIIM_ANAR, MIIM_ANAR_INIT, NULL},
+ {MIIM_CONTROL, MIIM_CONTROL_RESET, NULL},
+ {MIIM_CONTROL, MIIM_CONTROL_INIT, &mii_cr_init},
+ {miim_end,}
+ },
+ (struct phy_cmd[]){ /* startup */
+ /* Status is read once to clear old link state */
+ {MIIM_STATUS, miim_read, NULL},
+ /* Auto-negotiate */
+ {MIIM_STATUS, miim_read, &mii_parse_sr},
+ /* Read the status */
+ {MIIM_RTL8211B_PHY_STATUS, miim_read, &mii_parse_RTL8211B_sr},
+ {miim_end,}
+ },
+ (struct phy_cmd[]){ /* shutdown */
+ {miim_end,}
+ },
+};
+
struct phy_info *phy_info[] = {
&phy_info_cis8204,
&phy_info_cis8201,
&phy_info_dm9161,
&phy_info_lxt971,
&phy_info_VSC8244,
+ &phy_info_VSC8601,
&phy_info_dp83865,
+ &phy_info_rtl8211b,
&phy_info_generic,
NULL
};
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \
&& !defined(BITBANGMII)
-struct tsec_private *get_priv_for_phy(unsigned char phyaddr)
-{
- int i;
-
- for (i = 0; i < MAXCONTROLLERS; i++) {
- if (privlist[i]->phyaddr == phyaddr)
- return privlist[i];
- }
-
- return NULL;
-}
-
/*
* Read a MII PHY register.
*
unsigned char reg, unsigned short *value)
{
unsigned short ret;
- struct tsec_private *priv = get_priv_for_phy(addr);
+ struct tsec_private *priv = privlist[0];
if (NULL == priv) {
printf("Can't read PHY at address %d\n", addr);
return -1;
}
- ret = (unsigned short)read_phy_reg(priv, reg);
+ ret = (unsigned short)read_any_phy_reg(priv, addr, reg);
*value = ret;
return 0;
static int tsec_miiphy_write(char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
- struct tsec_private *priv = get_priv_for_phy(addr);
+ struct tsec_private *priv = privlist[0];
if (NULL == priv) {
printf("Can't write PHY at address %d\n", addr);
return -1;
}
- write_phy_reg(priv, reg, value);
+ write_any_phy_reg(priv, addr, reg, value);
return 0;
}
projects / u-boot / blobdiff