TSEC: add config options for VSC8601 RGMII PHY

[u-boot] / drivers / net / tsec.h

diff --git a/drivers/net/tsec.h b/drivers/net/tsec.h
index 2f0092ad59888d6502ca245a0da5634b940f558d..597ea1d3c7fd8fff8466a143ab717fb1ac15f5c2 100644 (file)
--- a/drivers/net/tsec.h
+++ b/drivers/net/tsec.h
@@ -112,6 +112,8 @@
 #define MIIM_GBIT_CONTROL      0x9
 #define MIIM_GBIT_CONTROL_INIT 0xe00
 
+#define MIIM_EXT_PAGE_ACCESS   0x1f
+
 /* Broadcom BCM54xx -- taken from linux sungem_phy */
 #define MIIM_BCM54xx_AUXSTATUS                 0x19
 #define MIIM_BCM54xx_AUXSTATUS_LINKMODE_MASK   0x0700
@@ -159,6 +161,12 @@
 #define MIIM_VSC8244_LED_CON            0x1b
 #define MIIM_VSC8244_LEDCON_INIT        0xF011
 
+/* Entry for Vitesse VSC8601 regs starts here (Not complete) */
+/* Vitesse VSC8601 Extended PHY Control Register 1 */
+#define MIIM_VSC8601_EPHY_CON          0x17
+#define MIIM_VSC8601_EPHY_CON_INIT_SKEW        0x1120
+#define MIIM_VSC8601_SKEW_CTRL         0x1c
+
 /* 88E1011 PHY Status Register */
 #define MIIM_88E1011_PHY_STATUS         0x11
 #define MIIM_88E1011_PHYSTAT_SPEED      0xc000
@@ -172,9 +180,9 @@
 #define MIIM_88E1011_PHY_MDI_X_AUTO    0x0060
 
 /* 88E1111 PHY LED Control Register */
-#define MIIM_88E1111_PHY_LED_CONTROL   24
-#define MIIM_88E1111_PHY_LED_DIRECT    0x4100
-#define MIIM_88E1111_PHY_LED_COMBINE   0x411C
+#define MIIM_88E1111_PHY_LED_CONTROL   24
+#define MIIM_88E1111_PHY_LED_DIRECT    0x4100
+#define MIIM_88E1111_PHY_LED_COMBINE   0x411C
 
 /* 88E1145 Extended PHY Specific Control Register */
 #define MIIM_88E1145_PHY_EXT_CR 20
@@ -184,6 +192,14 @@
 #define MIIM_88E1145_PHY_PAGE   29
 #define MIIM_88E1145_PHY_CAL_OV 30
 
+/* RTL8211B PHY Status Register */
+#define MIIM_RTL8211B_PHY_STATUS       0x11
+#define MIIM_RTL8211B_PHYSTAT_SPEED    0xc000
+#define MIIM_RTL8211B_PHYSTAT_GBIT     0x8000
+#define MIIM_RTL8211B_PHYSTAT_100      0x4000
+#define MIIM_RTL8211B_PHYSTAT_DUPLEX   0x2000
+#define MIIM_RTL8211B_PHYSTAT_SPDDONE  0x0800
+#define MIIM_RTL8211B_PHYSTAT_LINK     0x0400
 
 /* DM9161 Control register values */
 #define MIIM_DM9161_CR_STOP    0x0400