+// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ * Copyright 2007, 2010 Freescale Semiconductor, Inc.
*
* Author: Roy Zang <tie-fei.zang@freescale.com>, Sep, 2007
*
* Description:
* ULI 526x Ethernet port driver.
* Based on the Linux driver: drivers/net/tulip/uli526x.c
- *
- * This is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
*/
#include <common.h>
#include <malloc.h>
#include <net.h>
+#include <netdev.h>
#include <asm/io.h>
#include <pci.h>
#include <miiphy.h>
/* some kernel function compatible define */
-#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
- defined(CONFIG_ULI526X)
-
#undef DEBUG
/* Board/System/Debug information/definition */
#define ULI5261_DEVICE_ID 0x5261
#define ULI5263_DEVICE_ID 0x5263
/* ULi M5261 ID*/
-#define PCI_ULI5261_ID ULI5261_DEVICE_ID << 16 | ULI_VENDOR_ID
+#define PCI_ULI5261_ID (ULI5261_DEVICE_ID << 16 | ULI_VENDOR_ID)
/* ULi M5263 ID*/
-#define PCI_ULI5263_ID ULI5263_DEVICE_ID << 16 | ULI_VENDOR_ID
+#define PCI_ULI5263_ID (ULI5263_DEVICE_ID << 16 | ULI_VENDOR_ID)
#define ULI526X_IO_SIZE 0x100
#define TX_DESC_CNT 0x10 /* Allocated Tx descriptors */
static int mode = 8;
/* function declaration -- */
-static int uli526x_start_xmit(struct eth_device *dev,
- volatile void *packet, int length);
-static const struct ethtool_ops netdev_ethtool_ops;
+static int uli526x_start_xmit(struct eth_device *dev, void *packet, int length);
static u16 read_srom_word(long, int);
static void uli526x_descriptor_init(struct uli526x_board_info *, unsigned long);
static void allocate_rx_buffer(struct uli526x_board_info *);
static void update_cr6(u32, unsigned long);
-static u16 phy_read(unsigned long, u8, u8, u32);
+static u16 uli_phy_read(unsigned long, u8, u8, u32);
static u16 phy_readby_cr10(unsigned long, u8, u8);
-static void phy_write(unsigned long, u8, u8, u16, u32);
+static void uli_phy_write(unsigned long, u8, u8, u16, u32);
static void phy_writeby_cr10(unsigned long, u8, u8, u16);
static void phy_write_1bit(unsigned long, u32, u32);
static u16 phy_read_1bit(unsigned long, u32);
iobase &= ~0xf;
dev = (struct eth_device *)malloc(sizeof *dev);
- sprintf(dev->name, "uli526x#%d\n", card_number);
+ if (!dev) {
+ printf("uli526x: Can not allocate memory\n");
+ break;
+ }
+ memset(dev, 0, sizeof(*dev));
+ sprintf(dev->name, "uli526x#%d", card_number);
db = (struct uli526x_board_info *)
malloc(sizeof(struct uli526x_board_info));
if (db->desc_pool_ptr == NULL)
return -1;
- db->buf_pool_ptr = &buf_pool[0];
+ db->buf_pool_ptr = (uchar *)&buf_pool[0];
db->buf_pool_dma_ptr = (dma_addr_t)&buf_pool[0];
if (db->buf_pool_ptr == NULL)
return -1;
i));
/* Set Node address */
- if (((u16 *) db->srom)[0] == 0xffff || ((u16 *) db->srom)[0] == 0)
+ if (((db->srom[0] == 0xff) && (db->srom[1] == 0xff)) ||
+ ((db->srom[0] == 0x00) && (db->srom[1] == 0x00)))
/* SROM absent, so write MAC address to ID Table */
set_mac_addr(dev);
else { /*Exist SROM*/
/* Reset & stop ULI526X board */
outl(ULI526X_RESET, db->ioaddr + DCR0);
udelay(5);
- phy_write(db->ioaddr, db->phy_addr, 0, 0x8000, db->chip_id);
+ uli_phy_write(db->ioaddr, db->phy_addr, 0, 0x8000, db->chip_id);
/* reset the board */
db->cr6_data &= ~(CR6_RXSC | CR6_TXSC); /* Disable Tx/Rx */
db->tx_packet_cnt = 0;
for (phy_tmp = 0; phy_tmp < 32; phy_tmp++) {
/* peer add */
- phy_value = phy_read(db->ioaddr, phy_tmp, 3, db->chip_id);
+ phy_value = uli_phy_read(db->ioaddr, phy_tmp, 3, db->chip_id);
if (phy_value != 0xffff && phy_value != 0) {
db->phy_addr = phy_tmp;
break;
if (!(inl(db->ioaddr + DCR12) & 0x8)) {
/* Phyxcer capability setting */
- phy_reg_reset = phy_read(db->ioaddr,
+ phy_reg_reset = uli_phy_read(db->ioaddr,
db->phy_addr, 0, db->chip_id);
phy_reg_reset = (phy_reg_reset | 0x8000);
- phy_write(db->ioaddr, db->phy_addr, 0,
+ uli_phy_write(db->ioaddr, db->phy_addr, 0,
phy_reg_reset, db->chip_id);
udelay(500);
}
/* Media Mode Process */
if (!(db->media_mode & ULI526X_AUTO))
- db->op_mode = db->media_mode; /* Force Mode */
+ db->op_mode = db->media_mode; /* Force Mode */
/* Initialize Transmit/Receive decriptor and CR3/4 */
uli526x_descriptor_init(db, db->ioaddr);
* Send a packet to media from the upper layer.
*/
-static int uli526x_start_xmit(struct eth_device *dev,
- volatile void *packet, int length)
+static int uli526x_start_xmit(struct eth_device *dev, void *packet, int length)
{
struct uli526x_board_info *db = dev->priv;
struct tx_desc *txptr;
rdes0 = le32_to_cpu(rxptr->rdes0);
#ifdef RX_DEBUG
- printf("%s(): rxptr->rdes0=%x:%x\n", __FUNCTION__, rxptr->rdes0);
+ printf("%s(): rxptr->rdes0=%x\n", __FUNCTION__, rxptr->rdes0);
#endif
if (!(rdes0 & 0x80000000)) { /* packet owner check */
if ((rdes0 & 0x300) != 0x300) {
/* error summary bit check */
if (rdes0 & 0x8000) {
/* This is a error packet */
- printf("Eroor: rdes0: %lx\n", rdes0);
+ printf("Error: rdes0: %x\n", rdes0);
}
if (!(rdes0 & 0x8000) ||
__FUNCTION__, i, rxptr->rx_buf_ptr[i]);
#endif
- NetReceive(rxptr->rx_buf_ptr, rxlen);
+ net_process_received_packet(
+ (uchar *)rxptr->rx_buf_ptr, rxlen);
uli526x_reuse_buf(rxptr);
} else {
tmp_tx_dma = db->first_tx_desc_dma;
for (tmp_tx = db->first_tx_desc, i = 0;
i < TX_DESC_CNT; i++, tmp_tx++) {
- tmp_tx->tx_buf_ptr = tmp_buf;
+ tmp_tx->tx_buf_ptr = (char *)tmp_buf;
tmp_tx->tdes0 = cpu_to_le32(0);
tmp_tx->tdes1 = cpu_to_le32(0x81000000); /* IC, chain */
tmp_tx->tdes2 = cpu_to_le32(tmp_buf_dma);
u32 addr;
for (index = 0; index < RX_DESC_CNT; index++) {
- addr = (u32)NetRxPackets[index];
+ addr = (u32)net_rx_packets[index];
addr += (16 - (addr & 15));
rxptr->rx_buf_ptr = (char *) addr;
rxptr->rdes2 = cpu_to_le32(addr);
u16 phy_reg;
/* Phyxcer capability setting */
- phy_reg = phy_read(db->ioaddr, db->phy_addr, 4, db->chip_id) & ~0x01e0;
+ phy_reg = uli_phy_read(db->ioaddr,
+ db->phy_addr, 4, db->chip_id) & ~0x01e0;
if (db->media_mode & ULI526X_AUTO) {
/* AUTO Mode */
phy_reg |= db->PHY_reg4;
db->media_mode |= ULI526X_AUTO;
}
- phy_write(db->ioaddr, db->phy_addr, 4, phy_reg, db->chip_id);
+ uli_phy_write(db->ioaddr, db->phy_addr, 4, phy_reg, db->chip_id);
/* Restart Auto-Negotiation */
- phy_write(db->ioaddr, db->phy_addr, 0, 0x1200, db->chip_id);
+ uli_phy_write(db->ioaddr, db->phy_addr, 0, 0x1200, db->chip_id);
udelay(50);
}
* Write a word to Phy register
*/
-static void phy_write(unsigned long iobase, u8 phy_addr, u8 offset,
+static void uli_phy_write(unsigned long iobase, u8 phy_addr, u8 offset,
u16 phy_data, u32 chip_id)
{
u16 i;
* Read a word data from phy register
*/
-static u16 phy_read(unsigned long iobase, u8 phy_addr, u8 offset, u32 chip_id)
+static u16 uli_phy_read(unsigned long iobase, u8 phy_addr, u8 offset,
+ u32 chip_id)
{
int i;
u16 phy_data;
udelay(10);
return;
}
-#endif