net: zynq_gem: Dont run any phy detection logic for GMII case

[u-boot] / drivers / net / zynq_gem.c

diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index 6dd87cf28f95540da795f9b414be4def7e494439..1390c36c6141c610a47dfddd2e0e1164dad5888f 100644 (file)
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -175,16 +175,14 @@ struct zynq_gem_priv {
        u32 rxbd_current;
        u32 rx_first_buf;
        int phyaddr;
-       u32 emio;
        int init;
        struct zynq_gem_regs *iobase;
        phy_interface_t interface;
        struct phy_device *phydev;
        int phy_of_handle;
        struct mii_dev *bus;
-#ifdef CONFIG_CLK_ZYNQMP
        struct clk clk;
-#endif
+       bool int_pcs;
 };
 
 static u32 phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum,
@@ -194,8 +192,8 @@ static u32 phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum,
        struct zynq_gem_regs *regs = priv->iobase;
        int err;
 
-       err = wait_for_bit(__func__, &regs->nwsr, ZYNQ_GEM_NWSR_MDIOIDLE_MASK,
-                           true, 20000, true);
+       err = wait_for_bit_le32(&regs->nwsr, ZYNQ_GEM_NWSR_MDIOIDLE_MASK,
+                               true, 20000, false);
        if (err)
                return err;
 
@@ -207,8 +205,8 @@ static u32 phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum,
        /* Write mgtcr and wait for completion */
        writel(mgtcr, &regs->phymntnc);
 
-       err = wait_for_bit(__func__, &regs->nwsr, ZYNQ_GEM_NWSR_MDIOIDLE_MASK,
-                           true, 20000, true);
+       err = wait_for_bit_le32(&regs->nwsr, ZYNQ_GEM_NWSR_MDIOIDLE_MASK,
+                               true, 20000, false);
        if (err)
                return err;
 
@@ -327,7 +325,8 @@ static int zynq_phy_init(struct udevice *dev)
        /* Enable only MDIO bus */
        writel(ZYNQ_GEM_NWCTRL_MDEN_MASK, &regs->nwctrl);
 
-       if (priv->interface != PHY_INTERFACE_MODE_SGMII) {
+       if ((priv->interface != PHY_INTERFACE_MODE_SGMII) &&
+           (priv->interface != PHY_INTERFACE_MODE_GMII)) {
                ret = phy_detection(dev);
                if (ret) {
                        printf("GEM PHY init failed\n");
@@ -340,12 +339,12 @@ static int zynq_phy_init(struct udevice *dev)
        if (!priv->phydev)
                return -ENODEV;
 
-       priv->phydev->supported = supported | ADVERTISED_Pause |
+       priv->phydev->supported &= supported | ADVERTISED_Pause |
                                  ADVERTISED_Asym_Pause;
        priv->phydev->advertising = priv->phydev->supported;
 
        if (priv->phy_of_handle > 0)
-               priv->phydev->dev->of_offset = priv->phy_of_handle;
+               dev_set_of_offset(priv->phydev->dev, priv->phy_of_handle);
 
        return phy_config(priv->phydev);
 }
@@ -410,10 +409,6 @@ static int zynq_gem_init(struct udevice *dev)
                dummy_rx_bd->addr = ZYNQ_GEM_RXBUF_WRAP_MASK |
                                ZYNQ_GEM_RXBUF_NEW_MASK;
                dummy_rx_bd->status = 0;
-               flush_dcache_range((ulong)&dummy_tx_bd, (ulong)&dummy_tx_bd +
-                                  sizeof(dummy_tx_bd));
-               flush_dcache_range((ulong)&dummy_rx_bd, (ulong)&dummy_rx_bd +
-                                  sizeof(dummy_rx_bd));
 
                writel((ulong)dummy_tx_bd, &regs->transmit_q1_ptr);
                writel((ulong)dummy_rx_bd, &regs->receive_q1_ptr);
@@ -432,7 +427,12 @@ static int zynq_gem_init(struct udevice *dev)
 
        nwconfig = ZYNQ_GEM_NWCFG_INIT;
 
-       if (priv->interface == PHY_INTERFACE_MODE_SGMII) {
+       /*
+        * Set SGMII enable PCS selection only if internal PCS/PMA
+        * core is used and interface is SGMII.
+        */
+       if (priv->interface == PHY_INTERFACE_MODE_SGMII &&
+           priv->int_pcs) {
                nwconfig |= ZYNQ_GEM_NWCFG_SGMII_ENBL |
                            ZYNQ_GEM_NWCFG_PCS_SEL;
 #ifdef CONFIG_ARM64
@@ -457,16 +457,17 @@ static int zynq_gem_init(struct udevice *dev)
                break;
        }
 
-       /* Change the rclk and clk only not using EMIO interface */
-       if (!priv->emio)
-#ifndef CONFIG_CLK_ZYNQMP
-               zynq_slcr_gem_clk_setup((ulong)priv->iobase !=
-                                       ZYNQ_GEM_BASEADDR0, clk_rate);
-#else
-               ret = clk_set_rate(&priv->clk, clk_rate);
-               if (IS_ERR_VALUE(ret))
-                       return -1;
-#endif
+       ret = clk_set_rate(&priv->clk, clk_rate);
+       if (IS_ERR_VALUE(ret) && ret != (unsigned long)-ENOSYS) {
+               dev_err(dev, "failed to set tx clock rate\n");
+               return ret;
+       }
+
+       ret = clk_enable(&priv->clk);
+       if (ret && ret != -ENOSYS) {
+               dev_err(dev, "failed to enable tx clock\n");
+               return ret;
+       }
 
        setbits_le32(&regs->nwctrl, ZYNQ_GEM_NWCTRL_RXEN_MASK |
                                        ZYNQ_GEM_NWCTRL_TXEN_MASK);
@@ -514,8 +515,8 @@ static int zynq_gem_send(struct udevice *dev, void *ptr, int len)
        if (priv->tx_bd->status & ZYNQ_GEM_TXBUF_EXHAUSTED)
                printf("TX buffers exhausted in mid frame\n");
 
-       return wait_for_bit(__func__, &regs->txsr, ZYNQ_GEM_TSR_DONE,
-                           true, 20000, true);
+       return wait_for_bit_le32(&regs->txsr, ZYNQ_GEM_TSR_DONE,
+                                true, 20000, true);
 }
 
 /* Do not check frame_recd flag in rx_status register 0x20 - just poll BD */
@@ -589,14 +590,12 @@ __weak int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
 
 static int zynq_gem_read_rom_mac(struct udevice *dev)
 {
-       int retval;
        struct eth_pdata *pdata = dev_get_platdata(dev);
 
-       retval = zynq_board_read_rom_ethaddr(pdata->enetaddr);
-       if (retval == -ENOSYS)
-               retval = 0;
+       if (!pdata)
+               return -ENOSYS;
 
-       return retval;
+       return zynq_board_read_rom_ethaddr(pdata->enetaddr);
 }
 
 static int zynq_gem_miiphy_read(struct mii_dev *bus, int addr,
@@ -639,13 +638,11 @@ static int zynq_gem_probe(struct udevice *dev)
        priv->tx_bd = (struct emac_bd *)bd_space;
        priv->rx_bd = (struct emac_bd *)((ulong)bd_space + BD_SEPRN_SPACE);
 
-#ifdef CONFIG_CLK_ZYNQMP
        ret = clk_get_by_name(dev, "tx_clk", &priv->clk);
        if (ret < 0) {
                dev_err(dev, "failed to get clock\n");
                return -EINVAL;
        }
-#endif
 
        priv->bus = mdio_alloc();
        priv->bus->read = zynq_gem_miiphy_read;
@@ -684,21 +681,21 @@ static int zynq_gem_ofdata_to_platdata(struct udevice *dev)
 {
        struct eth_pdata *pdata = dev_get_platdata(dev);
        struct zynq_gem_priv *priv = dev_get_priv(dev);
+       int node = dev_of_offset(dev);
        const char *phy_mode;
 
-       pdata->iobase = (phys_addr_t)dev_get_addr(dev);
+       pdata->iobase = (phys_addr_t)devfdt_get_addr(dev);
        priv->iobase = (struct zynq_gem_regs *)pdata->iobase;
        /* Hardcode for now */
-       priv->emio = 0;
        priv->phyaddr = -1;
 
-       priv->phy_of_handle = fdtdec_lookup_phandle(gd->fdt_blob,
-                                       dev->of_offset, "phy-handle");
+       priv->phy_of_handle = fdtdec_lookup_phandle(gd->fdt_blob, node,
+                                                   "phy-handle");
        if (priv->phy_of_handle > 0)
                priv->phyaddr = fdtdec_get_int(gd->fdt_blob,
                                        priv->phy_of_handle, "reg", -1);
 
-       phy_mode = fdt_getprop(gd->fdt_blob, dev->of_offset, "phy-mode", NULL);
+       phy_mode = fdt_getprop(gd->fdt_blob, node, "phy-mode", NULL);
        if (phy_mode)
                pdata->phy_interface = phy_get_interface_by_name(phy_mode);
        if (pdata->phy_interface == -1) {
@@ -707,7 +704,8 @@ static int zynq_gem_ofdata_to_platdata(struct udevice *dev)
        }
        priv->interface = pdata->phy_interface;
 
-       priv->emio = fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "xlnx,emio");
+       priv->int_pcs = fdtdec_get_bool(gd->fdt_blob, node,
+                                       "is-internal-pcspma");
 
        printf("ZYNQ GEM: %lx, phyaddr %x, interface %s\n", (ulong)priv->iobase,
               priv->phyaddr, phy_string_for_interface(priv->interface));