#include <asm/io.h>
#include <phy.h>
#include <miiphy.h>
+#include <wait_bit.h>
#include <watchdog.h>
#include <asm/system.h>
#include <asm/arch/hardware.h>
DECLARE_GLOBAL_DATA_PTR;
-#if !defined(CONFIG_PHYLIB)
-# error XILINX_GEM_ETHERNET requires PHYLIB
-#endif
-
/* Bit/mask specification */
#define ZYNQ_GEM_PHYMNTNC_OP_MASK 0x40020000 /* operation mask bits */
#define ZYNQ_GEM_PHYMNTNC_OP_R_MASK 0x20000000 /* read operation */
#define ZYNQ_GEM_NWCFG_SPEED1000 0x000000400 /* 1Gbps operation */
#define ZYNQ_GEM_NWCFG_FDEN 0x000000002 /* Full Duplex mode */
#define ZYNQ_GEM_NWCFG_FSREM 0x000020000 /* FCS removal */
+#define ZYNQ_GEM_NWCFG_SGMII_ENBL 0x080000000 /* SGMII Enable */
+#define ZYNQ_GEM_NWCFG_PCS_SEL 0x000000800 /* PCS select */
+#ifdef CONFIG_ARM64
+#define ZYNQ_GEM_NWCFG_MDCCLKDIV 0x000100000 /* Div pclk by 64, max 160MHz */
+#else
#define ZYNQ_GEM_NWCFG_MDCCLKDIV 0x0000c0000 /* Div pclk by 48, max 120MHz */
+#endif
#ifdef CONFIG_ARM64
# define ZYNQ_GEM_DBUS_WIDTH (1 << 21) /* 64 bit bus */
#define ZYNQ_GEM_TSR_DONE 0x00000020 /* Tx done mask */
+#define ZYNQ_GEM_PCS_CTL_ANEG_ENBL 0x1000
+
/* Use MII register 1 (MII status register) to detect PHY */
#define PHY_DETECT_REG 1
u32 reserved6[18];
#define STAT_SIZE 44
u32 stat[STAT_SIZE]; /* 0x100 - Octects transmitted Low reg */
- u32 reserved7[164];
+ u32 reserved9[20];
+ u32 pcscntrl;
+ u32 reserved7[143];
u32 transmit_q1_ptr; /* 0x440 - Transmit priority queue 1 */
u32 reserved8[15];
u32 receive_q1_ptr; /* 0x480 - Receive priority queue 1 */
/* Enable only MDIO bus */
writel(ZYNQ_GEM_NWCTRL_MDEN_MASK, ®s->nwctrl);
- ret = phy_detection(dev);
- if (ret) {
- printf("GEM PHY init failed\n");
- return ret;
+ if (priv->interface != PHY_INTERFACE_MODE_SGMII) {
+ ret = phy_detection(dev);
+ if (ret) {
+ printf("GEM PHY init failed\n");
+ return ret;
+ }
}
priv->phydev = phy_connect(priv->bus, priv->phyaddr, dev,
static int zynq_gem_init(struct udevice *dev)
{
- u32 i;
+ u32 i, nwconfig;
unsigned long clk_rate = 0;
struct zynq_gem_priv *priv = dev_get_priv(dev);
struct zynq_gem_regs *regs = priv->iobase;
return -1;
}
+ nwconfig = ZYNQ_GEM_NWCFG_INIT;
+
+ if (priv->interface == PHY_INTERFACE_MODE_SGMII) {
+ nwconfig |= ZYNQ_GEM_NWCFG_SGMII_ENBL |
+ ZYNQ_GEM_NWCFG_PCS_SEL;
+#ifdef CONFIG_ARM64
+ writel(readl(®s->pcscntrl) | ZYNQ_GEM_PCS_CTL_ANEG_ENBL,
+ ®s->pcscntrl);
+#endif
+ }
+
switch (priv->phydev->speed) {
case SPEED_1000:
- writel(ZYNQ_GEM_NWCFG_INIT | ZYNQ_GEM_NWCFG_SPEED1000,
+ writel(nwconfig | ZYNQ_GEM_NWCFG_SPEED1000,
®s->nwcfg);
clk_rate = ZYNQ_GEM_FREQUENCY_1000;
break;
case SPEED_100:
- writel(ZYNQ_GEM_NWCFG_INIT | ZYNQ_GEM_NWCFG_SPEED100,
+ writel(nwconfig | ZYNQ_GEM_NWCFG_SPEED100,
®s->nwcfg);
clk_rate = ZYNQ_GEM_FREQUENCY_100;
break;
return 0;
}
-static int wait_for_bit(const char *func, u32 *reg, const u32 mask,
- bool set, unsigned int timeout)
-{
- u32 val;
- unsigned long start = get_timer(0);
-
- while (1) {
- val = readl(reg);
-
- if (!set)
- val = ~val;
-
- if ((val & mask) == mask)
- return 0;
-
- if (get_timer(start) > timeout)
- break;
-
- if (ctrlc()) {
- puts("Abort\n");
- return -EINTR;
- }
-
- udelay(1);
- }
-
- debug("%s: Timeout (reg=%p mask=%08x wait_set=%i)\n",
- func, reg, mask, set);
-
- return -ETIMEDOUT;
-}
-
static int zynq_gem_send(struct udevice *dev, void *ptr, int len)
{
u32 addr, size;
printf("TX buffers exhausted in mid frame\n");
return wait_for_bit(__func__, ®s->txsr, ZYNQ_GEM_TSR_DONE,
- true, 20000);
+ true, 20000, true);
}
/* Do not check frame_recd flag in rx_status register 0x20 - just poll BD */
static int zynq_gem_recv(struct udevice *dev, int flags, uchar **packetp)
{
int frame_len;
+ u32 addr;
struct zynq_gem_priv *priv = dev_get_priv(dev);
struct emac_bd *current_bd = &priv->rx_bd[priv->rxbd_current];
- struct emac_bd *first_bd;
if (!(current_bd->addr & ZYNQ_GEM_RXBUF_NEW_MASK))
- return 0;
+ return -1;
if (!(current_bd->status &
(ZYNQ_GEM_RXBUF_SOF_MASK | ZYNQ_GEM_RXBUF_EOF_MASK))) {
printf("GEM: SOF or EOF not set for last buffer received!\n");
- return 0;
+ return -1;
}
frame_len = current_bd->status & ZYNQ_GEM_RXBUF_LEN_MASK;
- if (frame_len) {
- u32 addr = current_bd->addr & ZYNQ_GEM_RXBUF_ADD_MASK;
- addr &= ~(ARCH_DMA_MINALIGN - 1);
+ if (!frame_len) {
+ printf("%s: Zero size packet?\n", __func__);
+ return -1;
+ }
- net_process_received_packet((u8 *)(ulong)addr, frame_len);
+ addr = current_bd->addr & ZYNQ_GEM_RXBUF_ADD_MASK;
+ addr &= ~(ARCH_DMA_MINALIGN - 1);
+ *packetp = (uchar *)(uintptr_t)addr;
- if (current_bd->status & ZYNQ_GEM_RXBUF_SOF_MASK)
- priv->rx_first_buf = priv->rxbd_current;
- else {
- current_bd->addr &= ~ZYNQ_GEM_RXBUF_NEW_MASK;
- current_bd->status = 0xF0000000; /* FIXME */
- }
+ return frame_len;
+}
- if (current_bd->status & ZYNQ_GEM_RXBUF_EOF_MASK) {
- first_bd = &priv->rx_bd[priv->rx_first_buf];
- first_bd->addr &= ~ZYNQ_GEM_RXBUF_NEW_MASK;
- first_bd->status = 0xF0000000;
- }
+static int zynq_gem_free_pkt(struct udevice *dev, uchar *packet, int length)
+{
+ struct zynq_gem_priv *priv = dev_get_priv(dev);
+ struct emac_bd *current_bd = &priv->rx_bd[priv->rxbd_current];
+ struct emac_bd *first_bd;
+
+ if (current_bd->status & ZYNQ_GEM_RXBUF_SOF_MASK) {
+ priv->rx_first_buf = priv->rxbd_current;
+ } else {
+ current_bd->addr &= ~ZYNQ_GEM_RXBUF_NEW_MASK;
+ current_bd->status = 0xF0000000; /* FIXME */
+ }
- if ((++priv->rxbd_current) >= RX_BUF)
- priv->rxbd_current = 0;
+ if (current_bd->status & ZYNQ_GEM_RXBUF_EOF_MASK) {
+ first_bd = &priv->rx_bd[priv->rx_first_buf];
+ first_bd->addr &= ~ZYNQ_GEM_RXBUF_NEW_MASK;
+ first_bd->status = 0xF0000000;
}
+ if ((++priv->rxbd_current) >= RX_BUF)
+ priv->rxbd_current = 0;
+
return 0;
}
ZYNQ_GEM_NWCTRL_TXEN_MASK, 0);
}
+__weak int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
+{
+ return -ENOSYS;
+}
+
+static int zynq_gem_read_rom_mac(struct udevice *dev)
+{
+ int retval;
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+
+ retval = zynq_board_read_rom_ethaddr(pdata->enetaddr);
+ if (retval == -ENOSYS)
+ retval = 0;
+
+ return retval;
+}
+
static int zynq_gem_miiphy_read(struct mii_dev *bus, int addr,
int devad, int reg)
{
if (ret)
return ret;
- zynq_phy_init(dev);
-
- return 0;
+ return zynq_phy_init(dev);
}
static int zynq_gem_remove(struct udevice *dev)
.start = zynq_gem_init,
.send = zynq_gem_send,
.recv = zynq_gem_recv,
+ .free_pkt = zynq_gem_free_pkt,
.stop = zynq_gem_halt,
.write_hwaddr = zynq_gem_setup_mac,
+ .read_rom_hwaddr = zynq_gem_read_rom_mac,
};
static int zynq_gem_ofdata_to_platdata(struct udevice *dev)
}
priv->interface = pdata->phy_interface;
+ priv->emio = fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "xlnx,emio");
+
printf("ZYNQ GEM: %lx, phyaddr %d, interface %s\n", (ulong)priv->iobase,
priv->phyaddr, phy_string_for_interface(priv->interface));
projects / u-boot / blobdiff