Merge git://www.denx.de/git/u-boot-imx

[u-boot] / drivers / pci / Kconfig

diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 26aa2b0930a03b911f97180d2ef6237dcc5627bb..58f128d8a62c5a1e18101d01fc5ea3bb2ed241fe 100644 (file)
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -1,7 +1,15 @@
-menu "PCI"
+menuconfig PCI
+       bool "PCI support"
+       default y if PPC
+       help
+         Enable support for PCI (Peripheral Interconnect Bus), a type of bus
+         used on some devices to allow the CPU to communicate with its
+         peripherals.
+
+if PCI
 
 config DM_PCI
-       bool "Enable driver mode for PCI"
+       bool "Enable driver model for PCI"
        depends on DM
        help
          Use driver model for PCI. Driver model is the new method for
@@ -18,6 +26,30 @@ config DM_PCI_COMPAT
          measure when porting a board to use driver model for PCI. Once the
          board is fully supported, this option should be disabled.
 
+config PCI_PNP
+       bool "Enable Plug & Play support for PCI"
+       depends on PCI || DM_PCI
+       default y
+       help
+         Enable PCI memory and I/O space resource allocation and assignment.
+
+config PCIE_ECAM_GENERIC
+       bool "Generic ECAM-based PCI host controller support"
+       default n
+       depends on DM_PCI
+       help
+         Say Y here if you want to enable support for generic ECAM-based
+         PCIe host controllers, such as the one emulated by QEMU.
+
+config PCIE_DW_MVEBU
+       bool "Enable Armada-8K PCIe driver (DesignWare core)"
+       depends on DM_PCI
+       depends on ARMADA_8K
+       help
+         Say Y here if you want to enable PCIe controller support on
+         Armada-8K SoCs. The PCIe controller on Armada-8K is based on
+         DesignWare hardware.
+
 config PCI_SANDBOX
        bool "Sandbox PCI support"
        depends on SANDBOX && DM_PCI
@@ -31,6 +63,7 @@ config PCI_SANDBOX
 config PCI_TEGRA
        bool "Tegra PCI support"
        depends on TEGRA
+       depends on (TEGRA186 && POWER_DOMAIN) || (!TEGRA186)
        help
          Enable support for the PCIe controller found on some generations of
          Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has
@@ -38,4 +71,19 @@ config PCI_TEGRA
          with a total of 5 lanes. Some boards require this for Ethernet
          support to work (e.g. beaver, jetson-tk1).
 
-endmenu
+config PCI_XILINX
+       bool "Xilinx AXI Bridge for PCI Express"
+       depends on DM_PCI
+       help
+         Enable support for the Xilinx AXI bridge for PCI express, an IP block
+         which can be used on some generations of Xilinx FPGAs.
+
+config PCIE_LAYERSCAPE
+       bool "Layerscape PCIe support"
+       depends on DM_PCI
+       help
+         Support Layerscape PCIe. The Layerscape SoC may have one or several
+         PCIe controllers. The PCIe may works in RC or EP mode according to
+         RCW[HOST_AGT_PEX] setting.
+
+endif