+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2007-2012 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER
/* boot from PCIE --master */
- char *s = getenv("bootmaster");
+ char *s = env_get("bootmaster");
char pcie[6];
sprintf(pcie, "PCIE%d", pci_info->pci_num);
pciauto_prescan_setup_bridge(hose, dev, hose->current_busno);
}
+#ifdef CONFIG_SYS_FSL_ERRATUM_A007815
+ /* The Read-Only Write Enable bit defaults to 1 instead of 0.
+ * Set to 0 to protect the read-only registers.
+ */
+ clrbits_be32(&pci->dbi_ro_wr_en, 0x01);
+#endif
+
/* Use generic setup_device to initialize standard pci regs,
* but do not allocate any windows since any BAR found (such
* as PCSRBAR) is not in this cpu's memory space.
#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER
} else {
/* boot from PCIE --master releases slave's core 0 */
- char *s = getenv("bootmaster");
+ char *s = env_get("bootmaster");
char pcie[6];
sprintf(pcie, "PCIE%d", pci_info->pci_num);
#endif
#ifdef CONFIG_OF_BOARD_SETUP
-#include <libfdt.h>
+#include <linux/libfdt.h>
#include <fdt_support.h>
void ft_fsl_pci_setup(void *blob, const char *pci_compat,