sbc8641d: increase malloc pool size to a sane default

[u-boot] / drivers / pci / pci-uclass.c

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 416027438f1850f518a71be359caed40bf707e00..0756bbe8f1326b6377d24f6e7ae0fa60f2f4470d 100644 (file)
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -14,19 +14,42 @@
 #include <dm/lists.h>
 #include <dm/root.h>
 #include <dm/device-internal.h>
+#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
+#include <asm/fsp/fsp_support.h>
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
+static int pci_get_bus(int busnum, struct udevice **busp)
+{
+       int ret;
+
+       ret = uclass_get_device_by_seq(UCLASS_PCI, busnum, busp);
+
+       /* Since buses may not be numbered yet try a little harder with bus 0 */
+       if (ret == -ENODEV) {
+               ret = uclass_first_device(UCLASS_PCI, busp);
+               if (ret)
+                       return ret;
+               else if (!*busp)
+                       return -ENODEV;
+               ret = uclass_get_device_by_seq(UCLASS_PCI, busnum, busp);
+       }
+
+       return ret;
+}
+
 struct pci_controller *pci_bus_to_hose(int busnum)
 {
        struct udevice *bus;
        int ret;
 
-       ret = uclass_get_device_by_seq(UCLASS_PCI, busnum, &bus);
+       ret = pci_get_bus(busnum, &bus);
        if (ret) {
                debug("%s: Cannot get bus %d: ret=%d\n", __func__, busnum, ret);
                return NULL;
        }
+
        return dev_get_uclass_priv(bus);
 }
 
@@ -125,7 +148,7 @@ int pci_bus_find_bdf(pci_dev_t bdf, struct udevice **devp)
        struct udevice *bus;
        int ret;
 
-       ret = uclass_get_device_by_seq(UCLASS_PCI, PCI_BUS(bdf), &bus);
+       ret = pci_get_bus(PCI_BUS(bdf), &bus);
        if (ret)
                return ret;
        return pci_bus_find_devfn(bus, PCI_MASK_BUS(bdf), devp);
@@ -203,7 +226,7 @@ int pci_write_config(pci_dev_t bdf, int offset, unsigned long value,
        struct udevice *bus;
        int ret;
 
-       ret = uclass_get_device_by_seq(UCLASS_PCI, PCI_BUS(bdf), &bus);
+       ret = pci_get_bus(PCI_BUS(bdf), &bus);
        if (ret)
                return ret;
 
@@ -215,7 +238,7 @@ int dm_pci_write_config(struct udevice *dev, int offset, unsigned long value,
 {
        struct udevice *bus;
 
-       for (bus = dev; device_get_uclass_id(bus->parent) == UCLASS_PCI;)
+       for (bus = dev; device_is_on_pci_bus(bus);)
                bus = bus->parent;
        return pci_bus_write_config(bus, pci_get_bdf(dev), offset, value, size);
 }
@@ -268,7 +291,7 @@ int pci_read_config(pci_dev_t bdf, int offset, unsigned long *valuep,
        struct udevice *bus;
        int ret;
 
-       ret = uclass_get_device_by_seq(UCLASS_PCI, PCI_BUS(bdf), &bus);
+       ret = pci_get_bus(PCI_BUS(bdf), &bus);
        if (ret)
                return ret;
 
@@ -280,7 +303,7 @@ int dm_pci_read_config(struct udevice *dev, int offset, unsigned long *valuep,
 {
        struct udevice *bus;
 
-       for (bus = dev; device_get_uclass_id(bus->parent) == UCLASS_PCI;)
+       for (bus = dev; device_is_on_pci_bus(bus);)
                bus = bus->parent;
        return pci_bus_read_config(bus, pci_get_bdf(dev), offset, valuep,
                                   size);
@@ -628,6 +651,13 @@ error:
 
 static int pci_uclass_post_bind(struct udevice *bus)
 {
+       /*
+        * If there is no pci device listed in the device tree,
+        * don't bother scanning the device tree.
+        */
+       if (bus->of_offset == -1)
+               return 0;
+
        /*
         * Scan the device tree for devices. This does not probe the PCI bus,
         * as this is not permitted while binding. It just finds devices
@@ -749,6 +779,24 @@ static int pci_uclass_post_probe(struct udevice *bus)
        ret = pci_auto_config_devices(bus);
 #endif
 
+#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
+       /*
+        * Per Intel FSP specification, we should call FSP notify API to
+        * inform FSP that PCI enumeration has been done so that FSP will
+        * do any necessary initialization as required by the chipset's
+        * BIOS Writer's Guide (BWG).
+        *
+        * Unfortunately we have to put this call here as with driver model,
+        * the enumeration is all done on a lazy basis as needed, so until
+        * something is touched on PCI it won't happen.
+        *
+        * Note we only call this 1) after U-Boot is relocated, and 2)
+        * root bus has finished probing.
+        */
+       if ((gd->flags & GD_FLG_RELOC) && (bus->seq == 0))
+               ret = fsp_init_phase_pci();
+#endif
+
        return ret < 0 ? ret : 0;
 }
 
@@ -773,8 +821,8 @@ static int pci_uclass_child_post_bind(struct udevice *dev)
                if (ret != -ENOENT)
                        return -EINVAL;
        } else {
-               /* extract the bdf from fdt_pci_addr */
-               pplat->devfn = addr.phys_hi & 0xffff00;
+               /* extract the devfn from fdt_pci_addr */
+               pplat->devfn = addr.phys_hi & 0xff00;
        }
 
        return 0;