]> git.sur5r.net Git - u-boot/blobdiff - drivers/pci/pci-uclass.c
Merge git://www.denx.de/git/u-boot-marvell
[u-boot] / drivers / pci / pci-uclass.c
index c7fbf7bf669102bd20755e60997ef8528a3c6124..a1408f5bf1ca7c157f4210759ae0a73617020ead 100644 (file)
@@ -13,7 +13,6 @@
 #include <pci.h>
 #include <asm/io.h>
 #include <dm/lists.h>
-#include <dm/root.h>
 #include <dm/device-internal.h>
 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
 #include <asm/fsp/fsp_support.h>
@@ -682,7 +681,7 @@ int pci_bind_bus_devices(struct udevice *bus)
        found_multi = false;
        end = PCI_BDF(bus->seq, PCI_MAX_PCI_DEVICES - 1,
                      PCI_MAX_PCI_FUNCTIONS - 1);
-       for (bdf = PCI_BDF(bus->seq, 0, 0); bdf < end;
+       for (bdf = PCI_BDF(bus->seq, 0, 0); bdf <= end;
             bdf += PCI_BDF(0, 0, 1)) {
                struct pci_child_platdata *pplat;
                struct udevice *dev;
@@ -753,27 +752,6 @@ error:
        return ret;
 }
 
-static int pci_uclass_post_bind(struct udevice *bus)
-{
-       /*
-        * If there is no pci device listed in the device tree,
-        * don't bother scanning the device tree.
-        */
-       if (bus->of_offset == -1)
-               return 0;
-
-       /*
-        * Scan the device tree for devices. This does not probe the PCI bus,
-        * as this is not permitted while binding. It just finds devices
-        * mentioned in the device tree.
-        *
-        * Before relocation, only bind devices marked for pre-relocation
-        * use.
-        */
-       return dm_scan_fdt_node(bus, gd->fdt_blob, bus->of_offset,
-                               gd->flags & GD_FLG_RELOC ? false : true);
-}
-
 static int decode_regions(struct pci_controller *hose, const void *blob,
                          int parent_node, int node)
 {
@@ -859,10 +837,11 @@ static int pci_uclass_pre_probe(struct udevice *bus)
        hose = bus->uclass_priv;
 
        /* For bridges, use the top-level PCI controller */
-       if (device_get_uclass_id(bus->parent) == UCLASS_ROOT) {
+       if (!device_is_on_pci_bus(bus)) {
                hose->ctlr = bus;
-               ret = decode_regions(hose, gd->fdt_blob, bus->parent->of_offset,
-                               bus->of_offset);
+               ret = decode_regions(hose, gd->fdt_blob,
+                                    dev_of_offset(bus->parent),
+                                    dev_of_offset(bus));
                if (ret) {
                        debug("%s: Cannot decode regions\n", __func__);
                        return ret;
@@ -925,7 +904,7 @@ static int pci_uclass_child_post_bind(struct udevice *dev)
        struct fdt_pci_addr addr;
        int ret;
 
-       if (dev->of_offset == -1)
+       if (dev_of_offset(dev) == -1)
                return 0;
 
        /*
@@ -933,7 +912,7 @@ static int pci_uclass_child_post_bind(struct udevice *dev)
         * just check the address.
         */
        pplat = dev_get_parent_platdata(dev);
-       ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset,
+       ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev),
                                  FDT_PCI_SPACE_CONFIG, "reg", &addr);
 
        if (ret) {
@@ -1254,7 +1233,7 @@ UCLASS_DRIVER(pci) = {
        .id             = UCLASS_PCI,
        .name           = "pci",
        .flags          = DM_UC_FLAG_SEQ_ALIAS,
-       .post_bind      = pci_uclass_post_bind,
+       .post_bind      = dm_scan_fdt_dev,
        .pre_probe      = pci_uclass_pre_probe,
        .post_probe     = pci_uclass_post_probe,
        .child_post_bind = pci_uclass_child_post_bind,