bar_res = prefetch;
else
bar_res = mem;
-#endif
debug("PCI Autoconfig: BAR %d, %s, size=0x%llx, ",
bar_nr, bar_res == prefetch ? "Prf" : "Mem",
(unsigned long long)bar_size);
+#endif
}
#ifndef CONFIG_PCI_ENUM_ONLY
struct pci_region *pci_io;
u16 cmdstat, prefechable_64;
-#ifdef CONFIG_DM_PCI
- /* The root controller has the region information */
- struct pci_controller *ctlr_hose = pci_bus_to_hose(0);
-
- pci_mem = ctlr_hose->pci_mem;
- pci_prefetch = ctlr_hose->pci_prefetch;
- pci_io = ctlr_hose->pci_io;
-#else
pci_mem = hose->pci_mem;
pci_prefetch = hose->pci_prefetch;
pci_io = hose->pci_io;
-#endif
pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat);
pci_hose_read_config_word(hose, dev, PCI_PREF_MEMORY_BASE,
prefechable_64 &= PCI_PREF_RANGE_TYPE_MASK;
/* Configure bus number registers */
-#ifdef CONFIG_DM_PCI
- pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS, PCI_BUS(dev));
- pci_hose_write_config_byte(hose, dev, PCI_SECONDARY_BUS, sub_bus);
-#else
pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS,
PCI_BUS(dev) - hose->first_busno);
pci_hose_write_config_byte(hose, dev, PCI_SECONDARY_BUS,
sub_bus - hose->first_busno);
-#endif
pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS, 0xff);
if (pci_mem) {
struct pci_region *pci_prefetch;
struct pci_region *pci_io;
-#ifdef CONFIG_DM_PCI
- /* The root controller has the region information */
- struct pci_controller *ctlr_hose = pci_bus_to_hose(0);
-
- pci_mem = ctlr_hose->pci_mem;
- pci_prefetch = ctlr_hose->pci_prefetch;
- pci_io = ctlr_hose->pci_io;
-#else
pci_mem = hose->pci_mem;
pci_prefetch = hose->pci_prefetch;
pci_io = hose->pci_io;
-#endif
/* Configure bus number registers */
-#ifdef CONFIG_DM_PCI
- pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS, sub_bus);
-#else
pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS,
sub_bus - hose->first_busno);
-#endif
if (pci_mem) {
/* Round memory allocator to 1MB boundary */
unsigned short class;
int n;
-#ifdef CONFIG_DM_PCI
- /* The root controller has the region information */
- struct pci_controller *ctlr_hose = pci_bus_to_hose(0);
-
- pci_mem = ctlr_hose->pci_mem;
- pci_prefetch = ctlr_hose->pci_prefetch;
- pci_io = ctlr_hose->pci_io;
-#else
pci_mem = hose->pci_mem;
pci_prefetch = hose->pci_prefetch;
pci_io = hose->pci_io;
-#endif
pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
pciauto_setup_device(hose, dev, 2, pci_mem,
pci_prefetch, pci_io);
-#ifdef CONFIG_DM_PCI
- n = dm_pci_hose_probe_bus(hose, dev);
- if (n < 0)
- return n;
- sub_bus = (unsigned int)n;
-#else
/* Passing in current_busno allows for sibling P2P bridges */
hose->current_busno++;
pciauto_prescan_setup_bridge(hose, dev, hose->current_busno);
pciauto_postscan_setup_bridge(hose, dev, sub_bus);
sub_bus = hose->current_busno;
-#endif
break;
case PCI_CLASS_BRIDGE_CARDBUS:
debug("PCI Autoconfig: Found P2CardBus bridge, device %d\n",
PCI_DEV(dev));
-#ifndef CONFIG_DM_PCI
hose->current_busno++;
-#endif
break;
#if defined(CONFIG_PCIAUTO_SKIP_HOST_BRIDGE)