x86: fsp: Call fsp_init_phase_pci() in pci_uclass_post_probe()

[u-boot] / drivers / pci / pci_tegra.c

diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c
index a03ad5ff1fb6b7cf3f55c3c861367707012426cf..ebb959f1f31f079206424eb1ff2e2b52aa481ee4 100644 (file)
--- a/drivers/pci/pci_tegra.c
+++ b/drivers/pci/pci_tegra.c
@@ -445,11 +445,11 @@ static int tegra_pcie_parse_dt_ranges(const void *fdt, int node,
        }
 
        debug("PCI regions:\n");
-       debug("  I/O: %#x-%#x\n", pcie->io.start, pcie->io.end);
-       debug("  non-prefetchable memory: %#x-%#x\n", pcie->mem.start,
-             pcie->mem.end);
-       debug("  prefetchable memory: %#x-%#x\n", pcie->prefetch.start,
-             pcie->prefetch.end);
+       debug("  I/O: %pa-%pa\n", &pcie->io.start, &pcie->io.end);
+       debug("  non-prefetchable memory: %pa-%pa\n", &pcie->mem.start,
+             &pcie->mem.end);
+       debug("  prefetchable memory: %pa-%pa\n", &pcie->prefetch.start,
+             &pcie->prefetch.end);
 
        return 0;
 }
@@ -458,7 +458,7 @@ static int tegra_pcie_parse_port_info(const void *fdt, int node,
                                      unsigned int *index,
                                      unsigned int *lanes)
 {
-       pci_dev_t bdf;
+       struct fdt_pci_addr addr;
        int err;
 
        err = fdtdec_get_int(fdt, node, "nvidia,num-lanes", 0);
@@ -469,13 +469,13 @@ static int tegra_pcie_parse_port_info(const void *fdt, int node,
 
        *lanes = err;
 
-       err = fdtdec_pci_get_bdf(fdt, node, &bdf);
+       err = fdtdec_get_pci_addr(fdt, node, 0, "reg", &addr);
        if (err < 0) {
                error("failed to parse \"reg\" property");
                return err;
        }
 
-       *index = PCI_DEV(bdf) - 1;
+       *index = PCI_DEV(addr.phys_hi) - 1;
 
        return 0;
 }