arm64: a37xx: pinctrl: Correct mpp definitions

[u-boot] / drivers / pinctrl / mvebu / pinctrl-armada-37xx.c

diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index d32467ba57a518d40ec9c417e1d06410e48e2e24..010eb203b7f517355f8c81bae62ab8806f376cc7 100644 (file)
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -159,8 +159,8 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = {
        PIN_GRP_GPIO("pwm1", 12, 1, BIT(4), "pwm"),
        PIN_GRP_GPIO("pwm2", 13, 1, BIT(5), "pwm"),
        PIN_GRP_GPIO("pwm3", 14, 1, BIT(6), "pwm"),
-       PIN_GRP_GPIO("pmic1", 17, 1, BIT(7), "pmic"),
-       PIN_GRP_GPIO("pmic0", 16, 1, BIT(8), "pmic"),
+       PIN_GRP_GPIO("pmic1", 7, 1, BIT(7), "pmic"),
+       PIN_GRP_GPIO("pmic0", 6, 1, BIT(8), "pmic"),
        PIN_GRP_GPIO("i2c2", 2, 2, BIT(9), "i2c"),
        PIN_GRP_GPIO("i2c1", 0, 2, BIT(10), "i2c"),
        PIN_GRP_GPIO("spi_cs1", 17, 1, BIT(12), "spi"),
@@ -182,10 +182,11 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = {
 static struct armada_37xx_pin_group armada_37xx_sb_groups[] = {
        PIN_GRP_GPIO("usb32_drvvbus0", 0, 1, BIT(0), "drvbus"),
        PIN_GRP_GPIO("usb2_drvvbus1", 1, 1, BIT(1), "drvbus"),
-       PIN_GRP_GPIO("sdio_sb", 24, 5, BIT(2), "sdio"),
-       PIN_GRP_EXTRA("rgmii", 6, 14, BIT(3), 0, BIT(3), 23, 1, "mii", "gpio"),
-       PIN_GRP_GPIO("pcie1", 3, 2, BIT(4), "pcie"),
-       PIN_GRP_GPIO("ptp", 20, 3, BIT(5), "ptp"),
+       PIN_GRP_GPIO("sdio_sb", 24, 6, BIT(2), "sdio"),
+       PIN_GRP_GPIO("rgmii", 6, 12, BIT(3), "mii"),
+       PIN_GRP_GPIO("smi", 18, 2, BIT(4), "smi"),
+       PIN_GRP_GPIO("pcie1", 3, 3, BIT(5) | BIT(9) | BIT(10), "pcie"),
+       PIN_GRP_GPIO("ptp", 20, 3, BIT(11) | BIT(12) | BIT(13), "ptp"),
        PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"),
        PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"),
        PIN_GRP_GPIO_3("mii_col", 23, 1, BIT(8) | BIT(14), 0, BIT(8), BIT(14),
@@ -207,11 +208,11 @@ const struct armada_37xx_pin_data armada_37xx_pin_sb = {
 };
 
 static inline void armada_37xx_update_reg(unsigned int *reg,
-                                         unsigned int offset)
+                                         unsigned int *offset)
 {
        /* We never have more than 2 registers */
-       if (offset >= GPIO_PER_REG) {
-               offset -= GPIO_PER_REG;
+       if (*offset >= GPIO_PER_REG) {
+               *offset -= GPIO_PER_REG;
                *reg += sizeof(u32);
        }
 }
@@ -432,7 +433,7 @@ static int armada_37xx_gpio_get(struct udevice *dev, unsigned int offset)
        unsigned int reg = INPUT_VAL;
        unsigned int val, mask;
 
-       armada_37xx_update_reg(&reg, offset);
+       armada_37xx_update_reg(&reg, &offset);
        mask = BIT(offset);
 
        val = readl(info->base + reg);
@@ -447,7 +448,7 @@ static int armada_37xx_gpio_set(struct udevice *dev, unsigned int offset,
        unsigned int reg = OUTPUT_VAL;
        unsigned int mask, val;
 
-       armada_37xx_update_reg(&reg, offset);
+       armada_37xx_update_reg(&reg, &offset);
        mask = BIT(offset);
        val = value ? mask : 0;
 
@@ -463,7 +464,7 @@ static int armada_37xx_gpio_get_direction(struct udevice *dev,
        unsigned int reg = OUTPUT_EN;
        unsigned int val, mask;
 
-       armada_37xx_update_reg(&reg, offset);
+       armada_37xx_update_reg(&reg, &offset);
        mask = BIT(offset);
        val = readl(info->base + reg);
 
@@ -480,7 +481,7 @@ static int armada_37xx_gpio_direction_input(struct udevice *dev,
        unsigned int reg = OUTPUT_EN;
        unsigned int mask;
 
-       armada_37xx_update_reg(&reg, offset);
+       armada_37xx_update_reg(&reg, &offset);
        mask = BIT(offset);
 
        clrbits_le32(info->base + reg, mask);
@@ -495,7 +496,7 @@ static int armada_37xx_gpio_direction_output(struct udevice *dev,
        unsigned int reg = OUTPUT_EN;
        unsigned int mask;
 
-       armada_37xx_update_reg(&reg, offset);
+       armada_37xx_update_reg(&reg, &offset);
        mask = BIT(offset);
 
        setbits_le32(info->base + reg, mask);