spi: cadence_qspi: Fix compilation warning

[u-boot] / drivers / pinctrl / pinctrl-sti.c

diff --git a/drivers/pinctrl/pinctrl-sti.c b/drivers/pinctrl/pinctrl-sti.c
index 735e412f608e6682c1d5048f613f507a27ca4edf..f0cd845fea5468f0d04abc20b2ae09532070075c 100644 (file)
--- a/drivers/pinctrl/pinctrl-sti.c
+++ b/drivers/pinctrl/pinctrl-sti.c
@@ -1,10 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Pinctrl driver for STMicroelectronics STi SoCs
  *
- *  Copyright (c) 2017
- *  Patrice Chotard <patrice.chotard@st.com>
- *
- * SPDX-License-Identifier:    GPL-2.0
+ * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
+ * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
  */
 
 #include <common.h>
@@ -62,7 +61,7 @@ void sti_alternate_select(struct udevice *dev, struct sti_pin_desc *pin_desc)
        int bank = pin_desc->bank;
        int pin = pin_desc->pin;
 
-       sysconfreg = (unsigned long *)plat->regmap->base;
+       sysconfreg = (unsigned long *)plat->regmap->ranges[0].start;
 
        switch (bank) {
        case 0 ... 5:           /* in "SBC Bank" */
@@ -96,7 +95,7 @@ void sti_pin_configure(struct udevice *dev, struct sti_pin_desc *pin_desc)
        unsigned long *sysconfreg;
        int bank = pin_desc->bank;
 
-       sysconfreg = (unsigned long *)plat->regmap->base + 40;
+       sysconfreg = (unsigned long *)plat->regmap->ranges[0].start + 40;
 
        /*
         * NOTE: The PIO configuration for the PIO pins in the