]> git.sur5r.net Git - u-boot/blobdiff - drivers/pinctrl/renesas/sh_pfc.h
pinctrl: renesas: Add PORT_GP_11 helper macro
[u-boot] / drivers / pinctrl / renesas / sh_pfc.h
index 3b306c0457bae0d3ae5ad41de25c5ba6bf5968d3..975582620175d01e58205181a9c283479cb38bea 100644 (file)
@@ -245,6 +245,11 @@ sh_pfc_pin_to_bias_info(const struct sh_pfc_bias_info *info,
                        unsigned int num, unsigned int pin);
 int sh_pfc_config_mux_for_gpio(struct udevice *dev, unsigned pin_selector);
 
+extern const struct sh_pfc_soc_info r8a7790_pinmux_info;
+extern const struct sh_pfc_soc_info r8a7791_pinmux_info;
+extern const struct sh_pfc_soc_info r8a7792_pinmux_info;
+extern const struct sh_pfc_soc_info r8a7793_pinmux_info;
+extern const struct sh_pfc_soc_info r8a7794_pinmux_info;
 extern const struct sh_pfc_soc_info r8a7795_pinmux_info;
 extern const struct sh_pfc_soc_info r8a7796_pinmux_info;
 extern const struct sh_pfc_soc_info r8a77970_pinmux_info;
@@ -363,9 +368,13 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info;
        PORT_GP_CFG_1(bank, 9,  fn, sfx, cfg)
 #define PORT_GP_10(bank, fn, sfx)      PORT_GP_CFG_10(bank, fn, sfx, 0)
 
-#define PORT_GP_CFG_12(bank, fn, sfx, cfg)                             \
+#define PORT_GP_CFG_11(bank, fn, sfx, cfg)                             \
        PORT_GP_CFG_10(bank, fn, sfx, cfg),                             \
-       PORT_GP_CFG_1(bank, 10, fn, sfx, cfg),                          \
+       PORT_GP_CFG_1(bank, 10,  fn, sfx, cfg)
+#define PORT_GP_11(bank, fn, sfx)      PORT_GP_CFG_11(bank, fn, sfx, 0)
+
+#define PORT_GP_CFG_12(bank, fn, sfx, cfg)                             \
+       PORT_GP_CFG_11(bank, fn, sfx, cfg),                             \
        PORT_GP_CFG_1(bank, 11, fn, sfx, cfg)
 #define PORT_GP_12(bank, fn, sfx)      PORT_GP_CFG_12(bank, fn, sfx, 0)