serial: uniphier: set clock rate without clock-frequency property

[u-boot] / drivers / pwm / Kconfig

diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
index cd8f3570f06df33ca21c3fb48eed123412037427..2984b7976637caad4759149bd4fb19224989b5b1 100644 (file)
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
@@ -9,6 +9,15 @@ config DM_PWM
          frequency/period can be controlled along with the proportion of that
          time that the signal is high.
 
+config PWM_EXYNOS
+       bool "Enable support for the Exynos PWM"
+       depends on DM_PWM
+       help
+         This PWM is found on Samsung Exynos 5250 and other Samsung SoCs. It
+         supports a programmable period and duty cycle. A 32-bit counter is
+         used. It provides 5 channels which can be independently
+         programmed. Channel 4 (the last) is normally used as a timer.
+
 config PWM_ROCKCHIP
        bool "Enable support for the Rockchip PWM"
        depends on DM_PWM
@@ -17,3 +26,27 @@ config PWM_ROCKCHIP
          programmable period and duty cycle. A 32-bit counter is used.
          Various options provided in the hardware (such as capture mode and
          continuous/single-shot) are not supported by the driver.
+
+config PWM_SANDBOX
+       bool "Enable support for the sandbox PWM"
+       help
+         This is a sandbox PWM used for testing. It provides 3 channels and
+         records the settings passed into it, but otherwise does nothing
+         useful. The PWM can be enabled but is not connected to any outputs
+         so this is not very useful.
+
+config PWM_TEGRA
+       bool "Enable support for the Tegra PWM"
+       depends on DM_PWM
+       help
+         This PWM is found on Tegra 20 and other Nvidia SoCs. It supports
+         four channels with a programmable period and duty cycle. Only a
+         32KHz clock is supported by the driver but the duty cycle is
+         configurable.
+
+config PWM_SUNXI
+       bool "Enable support for the Allwinner Sunxi PWM"
+       depends on DM_PWM
+       help
+         This PWM is found on H3, A64 and other Allwinner SoCs. It supports a
+         programmable period and duty cycle. A 16-bit counter is used.