Merge branch 'master' of git://git.denx.de/u-boot-socfpga

[u-boot] / drivers / pwm / rk_pwm.c

diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c
index 2d289a4c07f12d583116397643467e3424735bbe..9254f5bc3975262dfb71ae487b3572e41698403b 100644 (file)
--- a/drivers/pwm/rk_pwm.c
+++ b/drivers/pwm/rk_pwm.c
@@ -6,15 +6,13 @@
  */
 
 #include <common.h>
+#include <clk.h>
 #include <div64.h>
 #include <dm.h>
 #include <pwm.h>
 #include <regmap.h>
 #include <syscon.h>
 #include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3288.h>
-#include <asm/arch/grf_rk3288.h>
 #include <asm/arch/pwm.h>
 #include <power/regulator.h>
 
@@ -22,7 +20,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 struct rk_pwm_priv {
        struct rk3288_pwm *regs;
-       struct rk3288_grf *grf;
+       ulong freq;
 };
 
 static int rk_pwm_set_config(struct udevice *dev, uint channel, uint period_ns,
@@ -38,8 +36,8 @@ static int rk_pwm_set_config(struct udevice *dev, uint channel, uint period_ns,
                RK_PWM_DISABLE,
                &regs->ctrl);
 
-       period = lldiv((uint64_t)(PD_BUS_PCLK_HZ / 1000) * period_ns, 1000000);
-       duty = lldiv((uint64_t)(PD_BUS_PCLK_HZ / 1000) * duty_ns, 1000000);
+       period = lldiv((uint64_t)(priv->freq / 1000) * period_ns, 1000000);
+       duty = lldiv((uint64_t)(priv->freq / 1000) * duty_ns, 1000000);
 
        writel(period, &regs->period_hpr);
        writel(duty, &regs->duty_lpr);
@@ -62,13 +60,8 @@ static int rk_pwm_set_enable(struct udevice *dev, uint channel, bool enable)
 static int rk_pwm_ofdata_to_platdata(struct udevice *dev)
 {
        struct rk_pwm_priv *priv = dev_get_priv(dev);
-       struct regmap *map;
 
        priv->regs = (struct rk3288_pwm *)dev_get_addr(dev);
-       map = syscon_get_regmap_by_driver_data(ROCKCHIP_SYSCON_GRF);
-       if (IS_ERR(map))
-               return PTR_ERR(map);
-       priv->grf = regmap_get_range(map, 0);
 
        return 0;
 }
@@ -76,8 +69,15 @@ static int rk_pwm_ofdata_to_platdata(struct udevice *dev)
 static int rk_pwm_probe(struct udevice *dev)
 {
        struct rk_pwm_priv *priv = dev_get_priv(dev);
-
-       rk_setreg(&priv->grf->soc_con2, 1 << 0);
+       struct clk clk;
+       int ret = 0;
+
+       ret = clk_get_by_index(dev, 0, &clk);
+       if (ret < 0) {
+               debug("%s get clock fail!\n", __func__);
+               return -EINVAL;
+       }
+       priv->freq = clk_get_rate(&clk);
 
        return 0;
 }