AT91: fix timer.c - remove reset_timer()

[u-boot] / drivers / qe / uccf.c

diff --git a/drivers/qe/uccf.c b/drivers/qe/uccf.c
index 25f74826c00a2f2fbf5e862340b602eb8c6a05a0..7f6337bac8e851e6309ab5ff6fd9a4fae411db5a 100644 (file)
--- a/drivers/qe/uccf.c
+++ b/drivers/qe/uccf.c
@@ -28,7 +28,6 @@
 #include "qe.h"
 #include "uccf.h"
 
-#if defined(CONFIG_QE)
 void ucc_fast_transmit_on_demand(ucc_fast_private_t *uccf)
 {
        out_be16(&uccf->uf_regs->utodr, UCC_FAST_TOD);
@@ -46,7 +45,7 @@ u32 ucc_fast_get_qe_cr_subblock(int ucc_num)
                case 6: return QE_CR_SUBBLOCK_UCCFAST7;
                case 7: return QE_CR_SUBBLOCK_UCCFAST8;
                default:        return QE_CR_SUBBLOCK_INVALID;
-    }
+       }
 }
 
 static void ucc_get_cmxucr_reg(int ucc_num, volatile u32 **p_cmxucr,
@@ -100,9 +99,9 @@ static void ucc_get_cmxucr_reg(int ucc_num, volatile u32 **p_cmxucr,
 
 static int ucc_set_clk_src(int ucc_num, qe_clock_e clock, comm_dir_e mode)
 {
-       volatile u32    *p_cmxucr;
-       u8              reg_num;
-       u8              shift;
+       volatile u32    *p_cmxucr = NULL;
+       u8              reg_num = 0;
+       u8              shift = 0;
        u32             clockBits;
        u32             clockMask;
        int             source = -1;
@@ -369,7 +368,7 @@ int ucc_fast_init(ucc_fast_info_t *uf_info, ucc_fast_private_t  **uccf_ret)
                out_be16(&uf_regs->urfset, UCC_GETH_URFSET_INIT);
                out_be16(&uf_regs->utfs, UCC_GETH_UTFS_INIT);
                out_be16(&uf_regs->utfet, UCC_GETH_UTFET_INIT);
-               out_be16(&uf_regs->utftt, UCC_GETH_UTFTT_INIT);
+               out_be16(&uf_regs->utftt, UCC_GETH_UTFTT_INIT);
        }
 
        /* Rx clock routing */
@@ -401,4 +400,3 @@ int ucc_fast_init(ucc_fast_info_t *uf_info, ucc_fast_private_t  **uccf_ret)
        *uccf_ret = uccf;
        return 0;
 }
-#endif /* CONFIG_QE */