Merge branch 'master' of git://git.denx.de/u-boot-sunxi

[u-boot] / drivers / reset / stm32-reset.c

diff --git a/drivers/reset/stm32-reset.c b/drivers/reset/stm32-reset.c
index 9c627d879f21fd2170d33063ea3e72606522c225..c21ede2aec91ba25be7da5598ce331d64e1aeef7 100644 (file)
--- a/drivers/reset/stm32-reset.c
+++ b/drivers/reset/stm32-reset.c
@@ -1,8 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright (C) STMicroelectronics SA 2017
- * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.
- *
- * SPDX-License-Identifier:    GPL-2.0+
+ * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
+ * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
  */
 
 #include <common.h>
@@ -11,7 +10,13 @@
 #include <reset-uclass.h>
 #include <asm/io.h>
 
-DECLARE_GLOBAL_DATA_PTR;
+/* reset clear offset for STM32MP RCC */
+#define RCC_CL 0x4
+
+enum rcc_type {
+       RCC_STM32 = 0,
+       RCC_STM32MP,
+};
 
 struct stm32_reset_priv {
        fdt_addr_t base;
@@ -35,7 +40,11 @@ static int stm32_reset_assert(struct reset_ctl *reset_ctl)
        debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__,
              reset_ctl->id, bank, offset);
 
-       setbits_le32(priv->base + bank, BIT(offset));
+       if (dev_get_driver_data(reset_ctl->dev) == RCC_STM32MP)
+               /* reset assert is done in rcc set register */
+               writel(BIT(offset), priv->base + bank);
+       else
+               setbits_le32(priv->base + bank, BIT(offset));
 
        return 0;
 }
@@ -48,7 +57,11 @@ static int stm32_reset_deassert(struct reset_ctl *reset_ctl)
        debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__,
              reset_ctl->id, bank, offset);
 
-       clrbits_le32(priv->base + bank, BIT(offset));
+       if (dev_get_driver_data(reset_ctl->dev) == RCC_STM32MP)
+               /* reset deassert is done in rcc clr register */
+               writel(BIT(offset), priv->base + bank + RCC_CL);
+       else
+               clrbits_le32(priv->base + bank, BIT(offset));
 
        return 0;
 }
@@ -64,16 +77,26 @@ static int stm32_reset_probe(struct udevice *dev)
 {
        struct stm32_reset_priv *priv = dev_get_priv(dev);
 
-       priv->base = devfdt_get_addr(dev);
-       if (priv->base == FDT_ADDR_T_NONE)
-               return -EINVAL;
+       priv->base = dev_read_addr(dev);
+       if (priv->base == FDT_ADDR_T_NONE) {
+               /* for MFD, get address of parent */
+               priv->base = dev_read_addr(dev->parent);
+               if (priv->base == FDT_ADDR_T_NONE)
+                       return -EINVAL;
+       }
 
        return 0;
 }
 
+static const struct udevice_id stm32_reset_ids[] = {
+       { .compatible = "st,stm32mp1-rcc-rst", .data = RCC_STM32MP },
+       { }
+};
+
 U_BOOT_DRIVER(stm32_rcc_reset) = {
        .name                   = "stm32_rcc_reset",
        .id                     = UCLASS_RESET,
+       .of_match               = stm32_reset_ids,
        .probe                  = stm32_reset_probe,
        .priv_auto_alloc_size   = sizeof(struct stm32_reset_priv),
        .ops                    = &stm32_reset_ops,