*/
#include <common.h>
+#include <clk.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
return serial_in_shift(addr + plat->reg_offset, plat->reg_shift);
}
+static u32 ns16550_getfcr(NS16550_t port)
+{
+ struct ns16550_platdata *plat = port->plat;
+
+ return plat->fcr;
+}
+
/* We can clean these up once everything is moved to driver model */
#define serial_out(value, addr) \
ns16550_writeb(com_port, \
#define serial_in(addr) \
ns16550_readb(com_port, \
(unsigned char *)addr - (unsigned char *)com_port)
+#else
+static u32 ns16550_getfcr(NS16550_t port)
+{
+ return UART_FCRVAL;
+}
#endif
int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
#endif
serial_out(UART_MCRVAL, &com_port->mcr);
- serial_out(UART_FCRVAL, &com_port->fcr);
+ serial_out(ns16550_getfcr(com_port), &com_port->fcr);
if (baud_divisor != -1)
NS16550_setbrg(com_port, baud_divisor);
#if defined(CONFIG_OMAP) || \
serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
NS16550_setbrg(com_port, 0);
serial_out(UART_MCRVAL, &com_port->mcr);
- serial_out(UART_FCRVAL, &com_port->fcr);
+ serial_out(ns16550_getfcr(com_port), &com_port->fcr);
NS16550_setbrg(com_port, baud_divisor);
}
#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
}
#if CONFIG_IS_ENABLED(OF_CONTROL)
+enum {
+ PORT_NS16550 = 0,
+};
+#endif
+
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
{
struct ns16550_platdata *plat = dev->platdata;
fdt_addr_t addr;
+ struct clk clk;
+ int err;
/* try Processor Local Bus device first */
addr = dev_get_addr(dev);
"reg-offset", 0);
plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
"reg-shift", 0);
- plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
- "clock-frequency",
- CONFIG_SYS_NS16550_CLK);
+
+ err = clk_get_by_index(dev, 0, &clk);
+ if (!err) {
+ err = clk_get_rate(&clk);
+ if (!IS_ERR_VALUE(err))
+ plat->clock = err;
+ } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
+ debug("ns16550 failed to get clock\n");
+ return err;
+ }
+
+ if (!plat->clock)
+ plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+ "clock-frequency",
+ CONFIG_SYS_NS16550_CLK);
if (!plat->clock) {
debug("ns16550 clock not defined\n");
return -EINVAL;
}
+ plat->fcr = UART_FCRVAL;
+
return 0;
}
#endif
.setbrg = ns16550_serial_setbrg,
};
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
#if CONFIG_IS_ENABLED(OF_CONTROL)
/*
* Please consider existing compatible strings before adding a new
* compatible string to your dts.
*/
static const struct udevice_id ns16550_serial_ids[] = {
- { .compatible = "ns16550" },
- { .compatible = "ns16550a" },
- { .compatible = "nvidia,tegra20-uart" },
- { .compatible = "snps,dw-apb-uart" },
- { .compatible = "ti,omap2-uart" },
- { .compatible = "ti,omap3-uart" },
- { .compatible = "ti,omap4-uart" },
- { .compatible = "ti,am3352-uart" },
- { .compatible = "ti,am4372-uart" },
- { .compatible = "ti,dra742-uart" },
+ { .compatible = "ns16550", .data = PORT_NS16550 },
+ { .compatible = "ns16550a", .data = PORT_NS16550 },
+ { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 },
+ { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 },
+ { .compatible = "ti,omap2-uart", .data = PORT_NS16550 },
+ { .compatible = "ti,omap3-uart", .data = PORT_NS16550 },
+ { .compatible = "ti,omap4-uart", .data = PORT_NS16550 },
+ { .compatible = "ti,am3352-uart", .data = PORT_NS16550 },
+ { .compatible = "ti,am4372-uart", .data = PORT_NS16550 },
+ { .compatible = "ti,dra742-uart", .data = PORT_NS16550 },
{}
};
#endif
.flags = DM_FLAG_PRE_RELOC,
};
#endif
+#endif /* !OF_PLATDATA */
#endif /* CONFIG_DM_SERIAL */