]> git.sur5r.net Git - u-boot/blobdiff - drivers/serial/serial_stm32.c
Merge git://git.denx.de/u-boot-sunxi
[u-boot] / drivers / serial / serial_stm32.c
index 286b954fdd74cfb98a93d573a1de1fca374aa90b..6717ffaaa5b9aed6a06fa6ab3e10b4024b6fb94c 100644 (file)
@@ -1,8 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
  * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -13,8 +12,6 @@
 #include <asm/arch/stm32.h>
 #include "serial_stm32.h"
 
-DECLARE_GLOBAL_DATA_PTR;
-
 static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
 {
        struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
@@ -45,10 +42,19 @@ static int stm32_serial_getc(struct udevice *dev)
        struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
        bool stm32f4 = plat->uart_info->stm32f4;
        fdt_addr_t base = plat->base;
+       u32 isr = readl(base + ISR_OFFSET(stm32f4));
 
-       if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_RXNE) == 0)
+       if ((isr & USART_ISR_FLAG_RXNE) == 0)
                return -EAGAIN;
 
+       if (isr & USART_ISR_FLAG_ORE) {
+               if (!stm32f4)
+                       setbits_le32(base + ICR_OFFSET, USART_ICR_OREF);
+               else
+                       readl(base + RDR_OFFSET(stm32f4));
+               return -EIO;
+       }
+
        return readl(base + RDR_OFFSET(stm32f4));
 }
 
@@ -58,7 +64,7 @@ static int stm32_serial_putc(struct udevice *dev, const char c)
        bool stm32f4 = plat->uart_info->stm32f4;
        fdt_addr_t base = plat->base;
 
-       if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_TXE) == 0)
+       if ((readl(base + ISR_OFFSET(stm32f4)) & USART_ISR_FLAG_TXE) == 0)
                return -EAGAIN;
 
        writel(c, base + TDR_OFFSET(stm32f4));
@@ -74,10 +80,10 @@ static int stm32_serial_pending(struct udevice *dev, bool input)
 
        if (input)
                return readl(base + ISR_OFFSET(stm32f4)) &
-                       USART_SR_FLAG_RXNE ? 1 : 0;
+                       USART_ISR_FLAG_RXNE ? 1 : 0;
        else
                return readl(base + ISR_OFFSET(stm32f4)) &
-                       USART_SR_FLAG_TXE ? 0 : 1;
+                       USART_ISR_FLAG_TXE ? 0 : 1;
 }
 
 static int stm32_serial_probe(struct udevice *dev)
@@ -109,11 +115,9 @@ static int stm32_serial_probe(struct udevice *dev)
                return plat->clock_rate;
        };
 
-       /* Disable uart-> disable overrun-> enable uart */
+       /* Disable uart-> enable fifo-> enable uart */
        clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
                     BIT(uart_enable_bit));
-       if (plat->uart_info->has_overrun_disable)
-               setbits_le32(base + CR3_OFFSET(stm32f4), USART_CR3_OVRDIS);
        if (plat->uart_info->has_fifo)
                setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN);
        setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |