+// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright (C) 2012-2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
+ * Copyright (C) 2012-2015 Panasonic Corporation
+ * Copyright (C) 2015-2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
+#include <common.h>
+#include <dm.h>
+#include <linux/io.h>
#include <linux/serial_reg.h>
-#include <asm/io.h>
-#include <asm/errno.h>
-#include <dm/device.h>
-#include <dm/platform_data/serial-uniphier.h>
+#include <linux/sizes.h>
+#include <linux/errno.h>
#include <serial.h>
-
-#define UART_REG(x) \
- u8 x; \
- u8 postpad_##x[3];
+#include <fdtdec.h>
/*
* Note: Register map is slightly different from that of 16550.
*/
struct uniphier_serial {
- UART_REG(rbr); /* 0x00 */
- UART_REG(ier); /* 0x04 */
- UART_REG(iir); /* 0x08 */
- UART_REG(fcr); /* 0x0c */
- u8 mcr; /* 0x10 */
- u8 lcr;
- u16 __postpad;
- UART_REG(lsr); /* 0x14 */
- UART_REG(msr); /* 0x18 */
- u32 __none1;
- u32 __none2;
- u16 dlr;
- u16 __postpad2;
+ u32 rx; /* In: Receive buffer */
+#define tx rx /* Out: Transmit buffer */
+ u32 ier; /* Interrupt Enable Register */
+ u32 iir; /* In: Interrupt ID Register */
+ u32 char_fcr; /* Charactor / FIFO Control Register */
+ u32 lcr_mcr; /* Line/Modem Control Register */
+#define LCR_SHIFT 8
+#define LCR_MASK (0xff << (LCR_SHIFT))
+ u32 lsr; /* In: Line Status Register */
+ u32 msr; /* In: Modem Status Register */
+ u32 __rsv0;
+ u32 __rsv1;
+ u32 dlr; /* Divisor Latch Register */
};
-#define thr rbr
-
-struct uniphier_serial_private_data {
+struct uniphier_serial_priv {
struct uniphier_serial __iomem *membase;
+ unsigned int uartclk;
};
#define uniphier_serial_port(dev) \
- ((struct uniphier_serial_private_data *)dev_get_priv(dev))->membase
+ ((struct uniphier_serial_priv *)dev_get_priv(dev))->membase
static int uniphier_serial_setbrg(struct udevice *dev, int baudrate)
{
- struct uniphier_serial_platform_data *plat = dev_get_platdata(dev);
+ struct uniphier_serial_priv *priv = dev_get_priv(dev);
struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
const unsigned int mode_x_div = 16;
unsigned int divisor;
- writeb(UART_LCR_WLEN8, &port->lcr);
-
- divisor = DIV_ROUND_CLOSEST(plat->uartclk, mode_x_div * baudrate);
+ divisor = DIV_ROUND_CLOSEST(priv->uartclk, mode_x_div * baudrate);
- writew(divisor, &port->dlr);
+ writel(divisor, &port->dlr);
return 0;
}
{
struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
- if (!(readb(&port->lsr) & UART_LSR_DR))
+ if (!(readl(&port->lsr) & UART_LSR_DR))
return -EAGAIN;
- return readb(&port->rbr);
+ return readl(&port->rx);
}
static int uniphier_serial_putc(struct udevice *dev, const char c)
{
struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
- if (!(readb(&port->lsr) & UART_LSR_THRE))
+ if (!(readl(&port->lsr) & UART_LSR_THRE))
return -EAGAIN;
- writeb(c, &port->thr);
+ writel(c, &port->tx);
return 0;
}
struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
if (input)
- return readb(&port->lsr) & UART_LSR_DR;
+ return readl(&port->lsr) & UART_LSR_DR;
else
- return !(readb(&port->lsr) & UART_LSR_THRE);
+ return !(readl(&port->lsr) & UART_LSR_THRE);
}
static int uniphier_serial_probe(struct udevice *dev)
{
- struct uniphier_serial_private_data *priv = dev_get_priv(dev);
- struct uniphier_serial_platform_data *plat = dev_get_platdata(dev);
-
- priv->membase = map_sysmem(plat->base, sizeof(struct uniphier_serial));
-
- if (!priv->membase)
+ DECLARE_GLOBAL_DATA_PTR;
+ struct uniphier_serial_priv *priv = dev_get_priv(dev);
+ struct uniphier_serial __iomem *port;
+ fdt_addr_t base;
+ u32 tmp;
+
+ base = devfdt_get_addr(dev);
+ if (base == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ port = devm_ioremap(dev, base, SZ_64);
+ if (!port)
return -ENOMEM;
- return 0;
-}
+ priv->membase = port;
-static int uniphier_serial_remove(struct udevice *dev)
-{
- unmap_sysmem(uniphier_serial_port(dev));
+ priv->uartclk = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
+ "clock-frequency", 0);
+
+ tmp = readl(&port->lcr_mcr);
+ tmp &= ~LCR_MASK;
+ tmp |= UART_LCR_WLEN8 << LCR_SHIFT;
+ writel(tmp, &port->lcr_mcr);
return 0;
}
-#ifdef CONFIG_OF_CONTROL
-static const struct udevice_id uniphier_uart_of_match = {
- { .compatible = "panasonic,uniphier-uart"},
- {},
+static const struct udevice_id uniphier_uart_of_match[] = {
+ { .compatible = "socionext,uniphier-uart" },
+ { /* sentinel */ }
};
-static int uniphier_serial_ofdata_to_platdata(struct udevice *dev)
-{
- /*
- * TODO: Masahiro Yamada (yamada.m@jp.panasonic.com)
- *
- * Implement conversion code from DTB to platform data
- * when supporting CONFIG_OF_CONTROL on UniPhir platform.
- */
-}
-#endif
-
static const struct dm_serial_ops uniphier_serial_ops = {
.setbrg = uniphier_serial_setbrg,
.getc = uniphier_serial_getc,
};
U_BOOT_DRIVER(uniphier_serial) = {
- .name = DRIVER_NAME,
+ .name = "uniphier-uart",
.id = UCLASS_SERIAL,
- .of_match = of_match_ptr(uniphier_uart_of_match),
- .ofdata_to_platdata = of_match_ptr(uniphier_serial_ofdata_to_platdata),
+ .of_match = uniphier_uart_of_match,
.probe = uniphier_serial_probe,
- .remove = uniphier_serial_remove,
- .priv_auto_alloc_size = sizeof(struct uniphier_serial_private_data),
- .platdata_auto_alloc_size =
- sizeof(struct uniphier_serial_platform_data),
+ .priv_auto_alloc_size = sizeof(struct uniphier_serial_priv),
.ops = &uniphier_serial_ops,
- .flags = DM_FLAG_PRE_RELOC,
};
projects / u-boot / blobdiff