#include <linux/compiler.h>
#include <serial.h>
-#define ZYNQ_UART_SR_TXEMPTY (1 << 3) /* TX FIFO empty */
-#define ZYNQ_UART_SR_TXACTIVE (1 << 11) /* TX active */
-#define ZYNQ_UART_SR_RXEMPTY 0x00000002 /* RX FIFO empty */
+DECLARE_GLOBAL_DATA_PTR;
-#define ZYNQ_UART_CR_TX_EN 0x00000010 /* TX enabled */
-#define ZYNQ_UART_CR_RX_EN 0x00000004 /* RX enabled */
-#define ZYNQ_UART_CR_TXRST 0x00000002 /* TX logic reset */
-#define ZYNQ_UART_CR_RXRST 0x00000001 /* RX logic reset */
+#define ZYNQ_UART_SR_TXACTIVE BIT(11) /* TX active */
+#define ZYNQ_UART_SR_TXFULL BIT(4) /* TX FIFO full */
+#define ZYNQ_UART_SR_RXEMPTY BIT(1) /* RX FIFO empty */
+
+#define ZYNQ_UART_CR_TX_EN BIT(4) /* TX enabled */
+#define ZYNQ_UART_CR_RX_EN BIT(2) /* RX enabled */
+#define ZYNQ_UART_CR_TXRST BIT(1) /* TX logic reset */
+#define ZYNQ_UART_CR_RXRST BIT(0) /* RX logic reset */
#define ZYNQ_UART_MR_PARITY_NONE 0x00000020 /* No parity mode */
static int _uart_zynq_serial_putc(struct uart_zynq *regs, const char c)
{
- if (!(readl(®s->channel_sts) & ZYNQ_UART_SR_TXEMPTY))
+ if (readl(®s->channel_sts) & ZYNQ_UART_SR_TXFULL)
return -EAGAIN;
writel(c, ®s->tx_rx_fifo);
return 0;
}
-int zynq_serial_setbrg(struct udevice *dev, int baudrate)
+static int zynq_serial_setbrg(struct udevice *dev, int baudrate)
{
struct zynq_uart_priv *priv = dev_get_priv(dev);
unsigned long clock;
{
struct zynq_uart_priv *priv = dev_get_priv(dev);
+ /* No need to reinitialize the UART after relocation */
+ if (gd->flags & GD_FLG_RELOC)
+ return 0;
+
_uart_zynq_serial_init(priv->regs);
return 0;