rockchip: dts: Enable SARADC for rk3399-evb

[u-boot] / drivers / spi / designware_spi.c

diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 98c9f036f2e4f58c4f23831e2b33d18d3670be3e..5aa507b2d8b2a70736a5eb9076b899c9ddf27b6d 100644 (file)
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -74,14 +74,14 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SPI_CFS_OFFSET                 12
 
 /* Bit fields in SR, 7 bits */
-#define SR_MASK                                0x7f            /* cover 7 bits */
-#define SR_BUSY                                (1 << 0)
-#define SR_TF_NOT_FULL                 (1 << 1)
-#define SR_TF_EMPT                     (1 << 2)
-#define SR_RF_NOT_EMPT                 (1 << 3)
-#define SR_RF_FULL                     (1 << 4)
-#define SR_TX_ERR                      (1 << 5)
-#define SR_DCOL                                (1 << 6)
+#define SR_MASK                                GENMASK(6, 0)   /* cover 7 bits */
+#define SR_BUSY                                BIT(0)
+#define SR_TF_NOT_FULL                 BIT(1)
+#define SR_TF_EMPT                     BIT(2)
+#define SR_RF_NOT_EMPT                 BIT(3)
+#define SR_RF_FULL                     BIT(4)
+#define SR_TX_ERR                      BIT(5)
+#define SR_DCOL                                BIT(6)
 
 #define RX_TIMEOUT                     1000            /* timeout in ms */
 
@@ -132,9 +132,9 @@ static int dw_spi_ofdata_to_platdata(struct udevice *bus)
 {
        struct dw_spi_platdata *plat = bus->platdata;
        const void *blob = gd->fdt_blob;
-       int node = bus->of_offset;
+       int node = dev_of_offset(bus);
 
-       plat->regs = (struct dw_spi *)fdtdec_get_addr(blob, node, "reg");
+       plat->regs = (struct dw_spi *)devfdt_get_addr(bus);
 
        /* Use 500KHz as a suitable default */
        plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency",
@@ -164,13 +164,13 @@ static void spi_hw_init(struct dw_spi_priv *priv)
        if (!priv->fifo_len) {
                u32 fifo;
 
-               for (fifo = 2; fifo <= 257; fifo++) {
+               for (fifo = 1; fifo < 256; fifo++) {
                        dw_writew(priv, DW_SPI_TXFLTR, fifo);
                        if (fifo != dw_readw(priv, DW_SPI_TXFLTR))
                                break;
                }
 
-               priv->fifo_len = (fifo == 257) ? 0 : fifo;
+               priv->fifo_len = (fifo == 1) ? 0 : fifo;
                dw_writew(priv, DW_SPI_TXFLTR, 0);
        }
        debug("%s: fifo_len=%d\n", __func__, priv->fifo_len);
@@ -409,7 +409,7 @@ static const struct dm_spi_ops dw_spi_ops = {
 };
 
 static const struct udevice_id dw_spi_ids[] = {
-       { .compatible = "snps,dw-spi-mmio" },
+       { .compatible = "snps,dw-apb-ssi" },
        { }
 };
 
@@ -421,6 +421,5 @@ U_BOOT_DRIVER(dw_spi) = {
        .ofdata_to_platdata = dw_spi_ofdata_to_platdata,
        .platdata_auto_alloc_size = sizeof(struct dw_spi_platdata),
        .priv_auto_alloc_size = sizeof(struct dw_spi_priv),
-       .per_child_auto_alloc_size = sizeof(struct spi_slave),
        .probe = dw_spi_probe,
 };