case 0:
ds->regs = (struct mcspi *)OMAP3_MCSPI1_BASE;
break;
+#ifdef OMAP3_MCSPI2_BASE
case 1:
ds->regs = (struct mcspi *)OMAP3_MCSPI2_BASE;
break;
+#endif
+#ifdef OMAP3_MCSPI3_BASE
case 2:
ds->regs = (struct mcspi *)OMAP3_MCSPI3_BASE;
break;
+#endif
+#ifdef OMAP3_MCSPI4_BASE
case 3:
ds->regs = (struct mcspi *)OMAP3_MCSPI4_BASE;
break;
+#endif
default:
printf("SPI error: unsupported bus %i. \
Supported busses 0 - 3\n", bus);
/* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS
* REVISIT: this controller could support SPI_3WIRE mode.
*/
+#ifdef CONFIG_OMAP3_SPI_D0_D1_SWAPPED
+ /*
+ * Some boards have D0 wired as MOSI / D1 as MISO instead of
+ * The normal D0 as MISO / D1 as MOSI.
+ */
+ conf &= ~OMAP3_MCSPI_CHCONF_DPE0;
+ conf |= OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1;
+#else
conf &= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1);
conf |= OMAP3_MCSPI_CHCONF_DPE0;
+#endif
/* wordlength */
conf &= ~OMAP3_MCSPI_CHCONF_WL_MASK;