powerpc: MPC8541CDS: Remove macro CONFIG_MPC8541CDS

[u-boot] / drivers / spi / rk_spi.c

diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c
index 35b528fa59d6d059a1c5f8d6c1813da1637265b3..105ee4a3ba59882c29f353c137316a5e027d1539 100644 (file)
--- a/drivers/spi/rk_spi.c
+++ b/drivers/spi/rk_spi.c
@@ -14,7 +14,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <spi.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/periph.h>
@@ -27,8 +27,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define DEBUG_RK_SPI   0
 
 struct rockchip_spi_platdata {
-       int periph_id;
-       struct udevice *pinctrl;
        s32 frequency;          /* Default clock frequency, -1 for none */
        fdt_addr_t base;
        uint deactivate_delay_us;       /* Delay to wait after deactivate */
@@ -37,8 +35,7 @@ struct rockchip_spi_platdata {
 
 struct rockchip_spi_priv {
        struct rockchip_spi *regs;
-       struct udevice *clk;
-       int clk_id;
+       struct clk clk;
        unsigned int max_freq;
        unsigned int mode;
        ulong last_transaction_us;      /* Time of last transaction end */
@@ -139,24 +136,13 @@ static int rockchip_spi_ofdata_to_platdata(struct udevice *bus)
        int ret;
 
        plat->base = dev_get_addr(bus);
-       ret = uclass_get_device(UCLASS_PINCTRL, 0, &plat->pinctrl);
-       if (ret)
-               return ret;
-       ret = pinctrl_get_periph_id(plat->pinctrl, bus);
 
-       if (ret < 0) {
-               debug("%s: Could not get peripheral ID for %s: %d\n", __func__,
-                     bus->name, ret);
-               return ret;
-       }
-       plat->periph_id = ret;
        ret = clk_get_by_index(bus, 0, &priv->clk);
        if (ret < 0) {
                debug("%s: Could not get clock for %s: %d\n", __func__,
                      bus->name, ret);
                return ret;
        }
-       priv->clk_id = ret;
 
        plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency",
                                         50000000);
@@ -164,8 +150,8 @@ static int rockchip_spi_ofdata_to_platdata(struct udevice *bus)
                                        "spi-deactivate-delay", 0);
        plat->activate_delay_us = fdtdec_get_int(blob, node,
                                                 "spi-activate-delay", 0);
-       debug("%s: base=%x, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n",
-             __func__, (uint)plat->base, plat->periph_id, plat->frequency,
+       debug("%s: base=%x, max-frequency=%d, deactivate_delay=%d\n",
+             __func__, (uint)plat->base, plat->frequency,
              plat->deactivate_delay_us);
 
        return 0;
@@ -187,7 +173,7 @@ static int rockchip_spi_probe(struct udevice *bus)
         * Use 99 MHz as our clock since it divides nicely into 594 MHz which
         * is the assumed speed for CLK_GENERAL.
         */
-       ret = clk_set_periph_rate(priv->clk, priv->clk_id, 99000000);
+       ret = clk_set_rate(&priv->clk, 99000000);
        if (ret < 0) {
                debug("%s: Failed to set clock: %d\n", __func__, ret);
                return ret;
@@ -207,11 +193,6 @@ static int rockchip_spi_claim_bus(struct udevice *dev)
        struct rockchip_spi *regs = priv->regs;
        u8 spi_dfs, spi_tf;
        uint ctrlr0;
-#if !CONFIG_IS_ENABLED(PINCTRL_FULL)
-       struct rockchip_spi_platdata *plat = dev_get_platdata(bus);
-       struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
-       int ret;
-#endif
 
        /* Disable the SPI hardware */
        rkspi_enable_chip(regs, 0);
@@ -273,19 +254,17 @@ static int rockchip_spi_claim_bus(struct udevice *dev)
        ctrlr0 |= (priv->tmode & TMOD_MASK) << TMOD_SHIFT;
 
        writel(ctrlr0, &regs->ctrlr0);
-#if !CONFIG_IS_ENABLED(PINCTRL_FULL)
-       ret = pinctrl_request(plat->pinctrl, plat->periph_id, slave_plat->cs);
-       if (ret) {
-               debug("%s: Cannot request pinctrl: %d\n", __func__, ret);
-               return ret;
-       }
-#endif
 
        return 0;
 }
 
 static int rockchip_spi_release_bus(struct udevice *dev)
 {
+       struct udevice *bus = dev->parent;
+       struct rockchip_spi_priv *priv = dev_get_priv(bus);
+
+       rkspi_enable_chip(priv->regs, false);
+
        return 0;
 }
 
@@ -314,7 +293,7 @@ static int rockchip_spi_xfer(struct udevice *dev, unsigned int bitlen,
        while (len > 0) {
                int todo = min(len, 0xffff);
 
-               rkspi_enable_chip(regs, true);
+               rkspi_enable_chip(regs, false);
                writel(todo - 1, &regs->ctrlr1);
                rkspi_enable_chip(regs, true);