mmc: sdhci: add the DMA select for SDMA

[u-boot] / drivers / spi / tegra_spi.c

diff --git a/drivers/spi/tegra_spi.c b/drivers/spi/tegra_spi.c
index 4a3e7996f96211b14bdd549a2e8716d3e3cf9024..9bb34e29381f7a452717854b0d6dcc4edc5a879b 100644 (file)
--- a/drivers/spi/tegra_spi.c
+++ b/drivers/spi/tegra_spi.c
@@ -23,16 +23,15 @@
  */
 
 #include <common.h>
-
 #include <malloc.h>
-#include <spi.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
-#include <asm/arch/clk_rst.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/pinmux.h>
 #include <asm/arch/uart-spi-switch.h>
-#include <asm/arch/tegra_spi.h>
+#include <asm/arch-tegra/clk_rst.h>
+#include <asm/arch-tegra/tegra_spi.h>
+#include <spi.h>
 
 #if defined(CONFIG_SPI_CORRUPTS_UART)
  #define corrupt_delay()       udelay(CONFIG_SPI_CORRUPTS_UART_DLY);
@@ -54,7 +53,7 @@ static inline struct tegra_spi_slave *to_tegra_spi(struct spi_slave *slave)
 
 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
 {
-       /* Tegra2 SPI-Flash - only 1 device ('bus/cs') */
+       /* Tegra20 SPI-Flash - only 1 device ('bus/cs') */
        if (bus != 0 || cs != 0)
                return 0;
        else
@@ -72,9 +71,9 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
                return NULL;
        }
 
-       if (max_hz > TEGRA2_SPI_MAX_FREQ) {
+       if (max_hz > TEGRA_SPI_MAX_FREQ) {
                printf("SPI error: unsupported frequency %d Hz. Max frequency"
-                       " is %d Hz\n", max_hz, TEGRA2_SPI_MAX_FREQ);
+                       " is %d Hz\n", max_hz, TEGRA_SPI_MAX_FREQ);
                return NULL;
        }
 
@@ -86,7 +85,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
        spi->slave.bus = bus;
        spi->slave.cs = cs;
        spi->freq = max_hz;
-       spi->regs = (struct spi_tegra *)TEGRA2_SPI_BASE;
+       spi->regs = (struct spi_tegra *)NV_PA_SPI_BASE;
        spi->mode = mode;
 
        return &spi->slave;
@@ -130,7 +129,7 @@ int spi_claim_bus(struct spi_slave *slave)
        debug("spi_init: COMMAND = %08x\n", readl(&regs->command));
 
        /*
-        * SPI pins on Tegra2 are muxed - change pinmux later due to UART
+        * SPI pins on Tegra20 are muxed - change pinmux later due to UART
         * issue.
         */
        pinmux_set_func(PINGRP_GMD, PMUX_FUNC_SFLASH);