#include <config.h>
#include <net.h>
#include <malloc.h>
+#include <asm/byteorder.h>
+#include <asm/errno.h>
#include <asm/io.h>
+#include <asm/unaligned.h>
#include <linux/types.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
#include <usb/mv_udc.h>
+#include "../host/ehci.h"
+#include "mv_udc.h"
-#if CONFIG_USB_MAX_CONTROLLER_COUNT > 1
-#error This driver only supports one single controller.
+/*
+ * Check if the system has too long cachelines. If the cachelines are
+ * longer then 128b, the driver will not be able flush/invalidate data
+ * cache over separate QH entries. We use 128b because one QH entry is
+ * 64b long and there are always two QH list entries for each endpoint.
+ */
+#if ARCH_DMA_MINALIGN > 128
+#error This driver can not work on systems with caches longer than 128b
#endif
#ifndef DEBUG
}
#endif
-#define PAGE_SIZE 4096
-#define QH_MAXNUM 32
static struct usb_endpoint_descriptor ep0_out_desc = {
.bLength = sizeof(struct usb_endpoint_descriptor),
.bDescriptorType = USB_DT_ENDPOINT,
.bmAttributes = USB_ENDPOINT_XFER_CONTROL,
};
-struct ept_queue_head *epts;
-struct ept_queue_item *items[2 * NUM_ENDPOINTS];
static int mv_pullup(struct usb_gadget *gadget, int is_on);
static int mv_ep_enable(struct usb_ep *ep,
const struct usb_endpoint_descriptor *desc);
};
static struct mv_drv controller = {
- .gadget = {
- .name = "mv_udc",
+ .gadget = {
+ .name = "mv_udc",
+ .ops = &mv_udc_ops,
+ .is_dualspeed = 1,
},
};
+/**
+ * mv_get_qh() - return queue head for endpoint
+ * @ep_num: Endpoint number
+ * @dir_in: Direction of the endpoint (IN = 1, OUT = 0)
+ *
+ * This function returns the QH associated with particular endpoint
+ * and it's direction.
+ */
+static struct ept_queue_head *mv_get_qh(int ep_num, int dir_in)
+{
+ return &controller.epts[(ep_num * 2) + dir_in];
+}
+
+/**
+ * mv_get_qtd() - return queue item for endpoint
+ * @ep_num: Endpoint number
+ * @dir_in: Direction of the endpoint (IN = 1, OUT = 0)
+ *
+ * This function returns the QH associated with particular endpoint
+ * and it's direction.
+ */
+static struct ept_queue_item *mv_get_qtd(int ep_num, int dir_in)
+{
+ return controller.items[(ep_num * 2) + dir_in];
+}
+
+/**
+ * mv_flush_qh - flush cache over queue head
+ * @ep_num: Endpoint number
+ *
+ * This function flushes cache over QH for particular endpoint.
+ */
+static void mv_flush_qh(int ep_num)
+{
+ struct ept_queue_head *head = mv_get_qh(ep_num, 0);
+ const uint32_t start = (uint32_t)head;
+ const uint32_t end = start + 2 * sizeof(*head);
+
+ flush_dcache_range(start, end);
+}
+
+/**
+ * mv_invalidate_qh - invalidate cache over queue head
+ * @ep_num: Endpoint number
+ *
+ * This function invalidates cache over QH for particular endpoint.
+ */
+static void mv_invalidate_qh(int ep_num)
+{
+ struct ept_queue_head *head = mv_get_qh(ep_num, 0);
+ uint32_t start = (uint32_t)head;
+ uint32_t end = start + 2 * sizeof(*head);
+
+ invalidate_dcache_range(start, end);
+}
+
+/**
+ * mv_flush_qtd - flush cache over queue item
+ * @ep_num: Endpoint number
+ *
+ * This function flushes cache over qTD pair for particular endpoint.
+ */
+static void mv_flush_qtd(int ep_num)
+{
+ struct ept_queue_item *item = mv_get_qtd(ep_num, 0);
+ const uint32_t start = (uint32_t)item;
+ const uint32_t end_raw = start + 2 * sizeof(*item);
+ const uint32_t end = roundup(end_raw, ARCH_DMA_MINALIGN);
+
+ flush_dcache_range(start, end);
+}
+
+/**
+ * mv_invalidate_qtd - invalidate cache over queue item
+ * @ep_num: Endpoint number
+ *
+ * This function invalidates cache over qTD pair for particular endpoint.
+ */
+static void mv_invalidate_qtd(int ep_num)
+{
+ struct ept_queue_item *item = mv_get_qtd(ep_num, 0);
+ const uint32_t start = (uint32_t)item;
+ const uint32_t end_raw = start + 2 * sizeof(*item);
+ const uint32_t end = roundup(end_raw, ARCH_DMA_MINALIGN);
+
+ invalidate_dcache_range(start, end);
+}
+
static struct usb_request *
mv_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags)
{
return;
}
-static void ep_enable(int num, int in)
+static void ep_enable(int num, int in, int maxpacket)
{
- struct ept_queue_head *head;
struct mv_udc *udc = (struct mv_udc *)controller.ctrl->hcor;
unsigned n;
- head = epts + 2*num + in;
n = readl(&udc->epctrl[num]);
if (in)
else
n |= (CTRL_RXE | CTRL_RXR | CTRL_RXT_BULK);
- if (num != 0)
- head->config = CONFIG_MAX_PKT(EP_MAX_PACKET_SIZE) | CONFIG_ZLT;
+ if (num != 0) {
+ struct ept_queue_head *head = mv_get_qh(num, in);
+
+ head->config = CONFIG_MAX_PKT(maxpacket) | CONFIG_ZLT;
+ mv_flush_qh(num);
+ }
writel(n, &udc->epctrl[num]);
}
int num, in;
num = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
in = (desc->bEndpointAddress & USB_DIR_IN) != 0;
- ep_enable(num, in);
mv_ep->desc = desc;
+
+ if (num) {
+ int max = get_unaligned_le16(&desc->wMaxPacketSize);
+
+ if ((max > 64) && (controller.gadget.speed == USB_SPEED_FULL))
+ max = 64;
+ if (ep->maxpacket != max) {
+ DBG("%s: from %d to %d\n", __func__,
+ ep->maxpacket, max);
+ ep->maxpacket = max;
+ }
+ }
+ ep_enable(num, in, ep->maxpacket);
+ DBG("%s: num=%d maxpacket=%d\n", __func__, num, ep->maxpacket);
return 0;
}
static int mv_ep_disable(struct usb_ep *ep)
{
+ struct mv_ep *mv_ep = container_of(ep, struct mv_ep, ep);
+
+ mv_ep->desc = NULL;
+ return 0;
+}
+
+static int mv_bounce(struct mv_ep *ep, int in)
+{
+ uint32_t addr = (uint32_t)ep->req.buf;
+ uint32_t ba;
+
+ /* Input buffer address is not aligned. */
+ if (addr & (ARCH_DMA_MINALIGN - 1))
+ goto align;
+
+ /* Input buffer length is not aligned. */
+ if (ep->req.length & (ARCH_DMA_MINALIGN - 1))
+ goto align;
+
+ /* The buffer is well aligned, only flush cache. */
+ ep->b_len = ep->req.length;
+ ep->b_buf = ep->req.buf;
+ goto flush;
+
+align:
+ /* Use internal buffer for small payloads. */
+ if (ep->req.length <= 64) {
+ ep->b_len = 64;
+ ep->b_buf = ep->b_fast;
+ } else {
+ ep->b_len = roundup(ep->req.length, ARCH_DMA_MINALIGN);
+ ep->b_buf = memalign(ARCH_DMA_MINALIGN, ep->b_len);
+ if (!ep->b_buf)
+ return -ENOMEM;
+ }
+ if (in)
+ memcpy(ep->b_buf, ep->req.buf, ep->req.length);
+
+flush:
+ ba = (uint32_t)ep->b_buf;
+ flush_dcache_range(ba, ba + ep->b_len);
+
return 0;
}
+static void mv_debounce(struct mv_ep *ep, int in)
+{
+ uint32_t addr = (uint32_t)ep->req.buf;
+ uint32_t ba = (uint32_t)ep->b_buf;
+
+ if (in) {
+ if (addr == ba)
+ return; /* not a bounce */
+ goto free;
+ }
+ invalidate_dcache_range(ba, ba + ep->b_len);
+
+ if (addr == ba)
+ return; /* not a bounce */
+
+ memcpy(ep->req.buf, ep->b_buf, ep->req.length);
+free:
+ /* Large payloads use allocated buffer, free it. */
+ if (ep->b_buf != ep->b_fast)
+ free(ep->b_buf);
+}
+
static int mv_ep_queue(struct usb_ep *ep,
struct usb_request *req, gfp_t gfp_flags)
{
struct mv_udc *udc = (struct mv_udc *)controller.ctrl->hcor;
struct ept_queue_item *item;
struct ept_queue_head *head;
- unsigned phys;
- int bit, num, len, in;
+ int bit, num, len, in, ret;
num = mv_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
in = (mv_ep->desc->bEndpointAddress & USB_DIR_IN) != 0;
- item = items[2 * num + in];
- head = epts + 2 * num + in;
- phys = (unsigned)req->buf;
+ item = mv_get_qtd(num, in);
+ head = mv_get_qh(num, in);
len = req->length;
+ ret = mv_bounce(mv_ep, in);
+ if (ret)
+ return ret;
+
item->next = TERMINATE;
item->info = INFO_BYTES(len) | INFO_IOC | INFO_ACTIVE;
- item->page0 = phys;
- item->page1 = (phys & 0xfffff000) + 0x1000;
+ item->page0 = (uint32_t)mv_ep->b_buf;
+ item->page1 = ((uint32_t)mv_ep->b_buf & 0xfffff000) + 0x1000;
+ mv_flush_qtd(num);
head->next = (unsigned) item;
head->info = 0;
- DBG("ept%d %s queue len %x, buffer %x\n",
- num, in ? "in" : "out", len, phys);
+ DBG("ept%d %s queue len %x, buffer %p\n",
+ num, in ? "in" : "out", len, mv_ep->b_buf);
+ mv_flush_qh(num);
if (in)
bit = EPT_TX(num);
else
bit = EPT_RX(num);
- flush_cache(phys, len);
- flush_cache((unsigned long)item, sizeof(struct ept_queue_item));
writel(bit, &udc->epprime);
return 0;
in = (ep->desc->bEndpointAddress & USB_DIR_IN) != 0;
if (num == 0)
ep->desc = &ep0_out_desc;
- item = items[2 * num + in];
+ item = mv_get_qtd(num, in);
+ mv_invalidate_qtd(num);
if (item->info & 0xff)
- printf("EP%d/%s FAIL nfo=%x pg0=%x\n",
- num, in ? "in" : "out", item->info, item->page0);
+ printf("EP%d/%s FAIL info=%x pg0=%x\n",
+ num, in ? "in" : "out", item->info, item->page0);
len = (item->info >> 16) & 0x7fff;
ep->req.length -= len;
+ mv_debounce(ep, in);
+
DBG("ept%d %s complete %x\n",
num, in ? "in" : "out", len);
ep->req.complete(&ep->ep, &ep->req);
int status = 0;
int num, in, _num, _in, i;
char *buf;
- head = epts;
+ head = mv_get_qh(0, 0); /* EP0 OUT */
- flush_cache((unsigned long)head, sizeof(struct ept_queue_head));
+ mv_invalidate_qh(0);
memcpy(&r, head->setup_data, sizeof(struct usb_ctrlrequest));
writel(EPT_RX(0), &udc->epstat);
DBG("handle setup %s, %x, %x index %x value %x\n", reqname(r.bRequest),
if ((r.wValue == 0) && (r.wLength == 0)) {
req->length = 0;
for (i = 0; i < NUM_ENDPOINTS; i++) {
- if (!controller.ep[i].desc)
+ struct mv_ep *ep = &controller.ep[i];
+
+ if (!ep->desc)
continue;
- num = controller.ep[i].desc->bEndpointAddress
+ num = ep->desc->bEndpointAddress
& USB_ENDPOINT_NUMBER_MASK;
- in = (controller.ep[i].desc->bEndpointAddress
+ in = (ep->desc->bEndpointAddress
& USB_DIR_IN) != 0;
if ((num == _num) && (in == _in)) {
- ep_enable(num, in);
+ ep_enable(num, in, ep->ep.maxpacket);
usb_ep_queue(controller.gadget.ep0,
req, 0);
break;
& USB_ENDPOINT_NUMBER_MASK;
in = (controller.ep[i].desc->bEndpointAddress
& USB_DIR_IN) != 0;
- head = epts + (num * 2) + (in);
+ head = mv_get_qh(num, in);
head->info = INFO_ACTIVE;
+ mv_flush_qh(num);
}
}
}
DBG("-- suspend --\n");
if (n & STS_PCI) {
- DBG("-- portchange --\n");
+ int max = 64;
+ int speed = USB_SPEED_FULL;
+
bit = (readl(&udc->portsc) >> 26) & 3;
+ DBG("-- portchange %x %s\n", bit, (bit == 2) ? "High" : "Full");
if (bit == 2) {
- controller.gadget.speed = USB_SPEED_HIGH;
- for (i = 1; i < NUM_ENDPOINTS && n; i++)
- if (controller.ep[i].desc)
- controller.ep[i].ep.maxpacket = 512;
- } else {
- controller.gadget.speed = USB_SPEED_FULL;
+ speed = USB_SPEED_HIGH;
+ max = 512;
+ }
+ controller.gadget.speed = speed;
+ for (i = 1; i < NUM_ENDPOINTS; i++) {
+ if (controller.ep[i].ep.maxpacket > max)
+ controller.ep[i].ep.maxpacket = max;
}
}
writel(USBCMD_ITC(MICRO_8FRAME) | USBCMD_RST, &udc->usbcmd);
udelay(200);
- writel((unsigned) epts, &udc->epinitaddr);
+ writel((unsigned)controller.epts, &udc->epinitaddr);
/* select DEVICE mode */
writel(USBMODE_DEVICE, &udc->usbmode);
static int mvudc_probe(void)
{
struct ept_queue_head *head;
+ uint8_t *imem;
int i;
- controller.gadget.ops = &mv_udc_ops;
- epts = memalign(PAGE_SIZE, QH_MAXNUM * sizeof(struct ept_queue_head));
- memset(epts, 0, QH_MAXNUM * sizeof(struct ept_queue_head));
+ const int num = 2 * NUM_ENDPOINTS;
+
+ const int eplist_min_align = 4096;
+ const int eplist_align = roundup(eplist_min_align, ARCH_DMA_MINALIGN);
+ const int eplist_raw_sz = num * sizeof(struct ept_queue_head);
+ const int eplist_sz = roundup(eplist_raw_sz, ARCH_DMA_MINALIGN);
+
+ const int ilist_align = roundup(ARCH_DMA_MINALIGN, 32);
+ const int ilist_ent_raw_sz = 2 * sizeof(struct ept_queue_item);
+ const int ilist_ent_sz = roundup(ilist_ent_raw_sz, ARCH_DMA_MINALIGN);
+ const int ilist_sz = NUM_ENDPOINTS * ilist_ent_sz;
+
+ /* The QH list must be aligned to 4096 bytes. */
+ controller.epts = memalign(eplist_align, eplist_sz);
+ if (!controller.epts)
+ return -ENOMEM;
+ memset(controller.epts, 0, eplist_sz);
+
+ /*
+ * Each qTD item must be 32-byte aligned, each qTD touple must be
+ * cacheline aligned. There are two qTD items for each endpoint and
+ * only one of them is used for the endpoint at time, so we can group
+ * them together.
+ */
+ controller.items_mem = memalign(ilist_align, ilist_sz);
+ if (!controller.items_mem) {
+ free(controller.epts);
+ return -ENOMEM;
+ }
+ memset(controller.items_mem, 0, ilist_sz);
+
for (i = 0; i < 2 * NUM_ENDPOINTS; i++) {
/*
- * For item0 and item1, they are served as ep0
- * out&in seperately
+ * Configure QH for each endpoint. The structure of the QH list
+ * is such that each two subsequent fields, N and N+1 where N is
+ * even, in the QH list represent QH for one endpoint. The Nth
+ * entry represents OUT configuration and the N+1th entry does
+ * represent IN configuration of the endpoint.
*/
- head = epts + i;
+ head = controller.epts + i;
if (i < 2)
head->config = CONFIG_MAX_PKT(EP0_MAX_PACKET_SIZE)
| CONFIG_ZLT | CONFIG_IOS;
head->next = TERMINATE;
head->info = 0;
- items[i] = memalign(PAGE_SIZE, sizeof(struct ept_queue_item));
+ imem = controller.items_mem + ((i >> 1) * ilist_ent_sz);
+ if (i & 1)
+ imem += sizeof(struct ept_queue_item);
+
+ controller.items[i] = (struct ept_queue_item *)imem;
+
+ if (i & 1) {
+ mv_flush_qh(i - 1);
+ mv_flush_qtd(i - 1);
+ }
}
INIT_LIST_HEAD(&controller.gadget.ep_list);
struct mv_udc *udc;
int ret;
- if (!driver
- || driver->speed < USB_SPEED_FULL
- || !driver->bind
- || !driver->setup) {
- DBG("bad parameter.\n");
+ if (!driver)
+ return -EINVAL;
+ if (!driver->bind || !driver->setup || !driver->disconnect)
+ return -EINVAL;
+ if (driver->speed != USB_SPEED_FULL && driver->speed != USB_SPEED_HIGH)
return -EINVAL;
- }
- ret = usb_lowlevel_init(0, (void **)&controller.ctrl);
+ ret = usb_lowlevel_init(0, USB_INIT_DEVICE, (void **)&controller.ctrl);
if (ret)
return ret;
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