]> git.sur5r.net Git - u-boot/blobdiff - drivers/usb/host/ehci-fsl.c
usb: ehci: fix Interrupt on Doorbell flag of USBCMD
[u-boot] / drivers / usb / host / ehci-fsl.c
index 1d012db92e6ff2cb2618321c550e70f6aa9f7177..45062e699bd7c38793e9bd6a5a3142e263c16f84 100644 (file)
@@ -18,6 +18,8 @@
 
 #include "ehci.h"
 
+static void set_txfifothresh(struct usb_ehci *, u32);
+
 /* Check USB PHY clock valid */
 static int usb_phy_clk_valid(struct usb_ehci *ehci)
 {
@@ -102,15 +104,20 @@ int ehci_hcd_init(int index, enum usb_init_type init,
 
        if (!strncmp(phy_type, "utmi", 4)) {
 #if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
-               setbits_be32(&ehci->control, PHY_CLK_SEL_UTMI);
-               setbits_be32(&ehci->control, UTMI_PHY_EN);
+               clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK,
+                               PHY_CLK_SEL_UTMI);
+               clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK,
+                               UTMI_PHY_EN);
                udelay(1000); /* delay required for PHY Clk to appear */
 #endif
                out_le32(&(*hcor)->or_portsc[0], PORT_PTS_UTMI);
-               setbits_be32(&ehci->control, USB_EN);
+               clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK,
+                               USB_EN);
        } else {
-               setbits_be32(&ehci->control, PHY_CLK_SEL_ULPI);
-               clrsetbits_be32(&ehci->control, UTMI_PHY_EN, USB_EN);
+               clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK,
+                               PHY_CLK_SEL_ULPI);
+               clrsetbits_be32(&ehci->control, UTMI_PHY_EN |
+                               CONTROL_REGISTER_W1C_MASK, USB_EN);
                udelay(1000); /* delay required for PHY Clk to appear */
                if (!usb_phy_clk_valid(ehci))
                        return -EINVAL;
@@ -123,6 +130,10 @@ int ehci_hcd_init(int index, enum usb_init_type init,
 
        in_le32(&ehci->usbmode);
 
+       if (SVR_SOC_VER(get_svr()) == SVR_T4240 &&
+           IS_SVR_REV(get_svr(), 2, 0))
+               set_txfifothresh(ehci, TXFIFOTHRESH);
+
        return 0;
 }
 
@@ -134,3 +145,17 @@ int ehci_hcd_stop(int index)
 {
        return 0;
 }
+
+/*
+ * Setting the value of TXFIFO_THRESH field in TXFILLTUNING register
+ * to counter DDR latencies in writing data into Tx buffer.
+ * This prevents Tx buffer from getting underrun
+ */
+static void set_txfifothresh(struct usb_ehci *ehci, u32 txfifo_thresh)
+{
+       u32 cmd;
+       cmd = ehci_readl(&ehci->txfilltuning);
+       cmd &= ~TXFIFO_THRESH_MASK;
+       cmd |= TXFIFO_THRESH(txfifo_thresh);
+       ehci_writel(&ehci->txfilltuning, cmd);
+}