Merge branch 'master' of git://www.denx.de/git/u-boot-imx

[u-boot] / drivers / usb / host / ehci-mx6.c

diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index e1c67f77d72d2cd96319e13992f647dfaee73435..8352c2bfc5c0bde0e1d4923326f4a44b3a1f1924 100644 (file)
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -10,7 +10,7 @@
 #include <errno.h>
 #include <wait_bit.h>
 #include <linux/compiler.h>
-#include <usb/ehci-fsl.h>
+#include <usb/ehci-ci.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
@@ -49,7 +49,7 @@
 #define USBNC_OFFSET           0x200
 #define USBNC_PHYSTATUS_ID_DIG (1 << 4) /* otg_id status */
 #define USBNC_PHYCFG2_ACAENB   (1 << 4) /* otg_id detection enable */
-#define UCTRL_PM                (1 << 9) /* OTG Power Mask */
+#define UCTRL_PWR_POL          (1 << 9) /* OTG Polarity of Power Pin */
 #define UCTRL_OVER_CUR_POL     (1 << 8) /* OTG Polarity of Overcurrent */
 #define UCTRL_OVER_CUR_DIS     (1 << 7) /* Disable OTG Overcurrent Detection */
 
@@ -194,8 +194,9 @@ struct usbnc_regs {
        u32 reserve1[10];
        u32 phy_cfg1;
        u32 phy_cfg2;
+       u32 reserve2;
        u32 phy_status;
-       u32 reserve2[4];
+       u32 reserve3[4];
        u32 adp_cfg1;
        u32 adp_cfg2;
        u32 adp_status;
@@ -206,9 +207,20 @@ static void usb_power_config(int index)
        struct usbnc_regs *usbnc = (struct usbnc_regs *)(USB_BASE_ADDR +
                        (0x10000 * index) + USBNC_OFFSET);
        void __iomem *phy_cfg2 = (void __iomem *)(&usbnc->phy_cfg2);
+       void __iomem *ctrl = (void __iomem *)(&usbnc->ctrl1);
+
+       /*
+        * Clear the ACAENB to enable usb_otg_id detection,
+        * otherwise it is the ACA detection enabled.
+        */
+       clrbits_le32(phy_cfg2, USBNC_PHYCFG2_ACAENB);
 
-       /* Enable usb_otg_id detection */
-       setbits_le32(phy_cfg2, USBNC_PHYCFG2_ACAENB);
+       /* Set power polarity to high active */
+#ifdef CONFIG_MXC_USB_OTG_HACTIVE
+       setbits_le32(ctrl, UCTRL_PWR_POL);
+#else
+       clrbits_le32(ctrl, UCTRL_PWR_POL);
+#endif
 }
 
 int usb_phy_mode(int port)
@@ -246,15 +258,11 @@ static void usb_oc_config(int index)
        setbits_le32(ctrl, UCTRL_OVER_CUR_POL);
 #endif
 
-#if defined(CONFIG_MX6)
        setbits_le32(ctrl, UCTRL_OVER_CUR_DIS);
-#elif defined(CONFIG_MX7)
-       setbits_le32(ctrl, UCTRL_OVER_CUR_DIS | UCTRL_PM);
-#endif
 }
 
 /**
- * board_ehci_hcd_init - override usb phy mode
+ * board_usb_phy_mode - override usb phy mode
  * @port:      usb host/otg port
  *
  * Target board specific, override usb_phy_mode.
@@ -310,6 +318,7 @@ int ehci_hcd_init(int index, enum usb_init_type init,
 #endif
        struct usb_ehci *ehci = (struct usb_ehci *)(USB_BASE_ADDR +
                (controller_spacing * index));
+       int ret;
 
        if (index > 3)
                return -EINVAL;
@@ -317,7 +326,9 @@ int ehci_hcd_init(int index, enum usb_init_type init,
        mdelay(1);
 
        /* Do board specific initialization */
-       board_ehci_hcd_init(index);
+       ret = board_ehci_hcd_init(index);
+       if (ret)
+               return ret;
 
        usb_power_config(index);
        usb_oc_config(index);