mx51: Fix USB PHY clocks

[u-boot] / drivers / usb / host / ehci-mxc.c

diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
index f403d49e7462b75a4a14d45703c6497954fde12e..a38bc9c1bb908c942fffc7e2cb556fcf488cd36d 100644 (file)
--- a/drivers/usb/host/ehci-mxc.c
+++ b/drivers/usb/host/ehci-mxc.c
@@ -25,7 +25,6 @@
 #include <errno.h>
 
 #include "ehci.h"
-#include "ehci-core.h"
 
 #define USBCTRL_OTGBASE_OFFSET 0x600
 
@@ -106,15 +105,14 @@ static int mxc_set_usbcontrol(int port, unsigned int flags)
        return 0;
 }
 
-int ehci_hcd_init(void)
+int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 {
        struct usb_ehci *ehci;
 #ifdef CONFIG_MX31
-       u32 tmp;
        struct clock_control_regs *sc_regs =
                (struct clock_control_regs *)CCM_BASE;
 
-       tmp = __raw_readl(&sc_regs->ccmr);
+       __raw_readl(&sc_regs->ccmr);
        __raw_writel(__raw_readl(&sc_regs->ccmr) | (1 << 9), &sc_regs->ccmr) ;
 #endif
 
@@ -122,15 +120,11 @@ int ehci_hcd_init(void)
 
        ehci = (struct usb_ehci *)(IMX_USB_BASE +
                (0x200 * CONFIG_MXC_USB_PORT));
-       hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
-       hcor = (struct ehci_hcor *)((uint32_t) hccr +
-                       HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
+       *hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
+       *hcor = (struct ehci_hcor *)((uint32_t) *hccr +
+                       HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
        setbits_le32(&ehci->usbmode, CM_HOST);
-#ifdef CONFIG_MX31
-       setbits_le32(&ehci->control, USB_EN);
-
        __raw_writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc);
-#endif
        mxc_set_usbcontrol(CONFIG_MXC_USB_PORT, CONFIG_MXC_USB_FLAGS);
 
        udelay(10000);
@@ -142,7 +136,7 @@ int ehci_hcd_init(void)
  * Destroy the appropriate control structures corresponding
  * the the EHCI host controller.
  */
-int ehci_hcd_stop(void)
+int ehci_hcd_stop(int index)
 {
        return 0;
 }