mxs: prefix register structs with 'mxs' prefix

[u-boot] / drivers / usb / host / isp116x-hcd.c

diff --git a/drivers/usb/host/isp116x-hcd.c b/drivers/usb/host/isp116x-hcd.c
index 348e404fe6832abe1a2f3e09896287f7a8a0c06f..5ef34c30fd964e64ad1d0bb66550b6364344d0c5 100644 (file)
--- a/drivers/usb/host/isp116x-hcd.c
+++ b/drivers/usb/host/isp116x-hcd.c
@@ -42,13 +42,13 @@
  *
  *    [[GNU/GPL disclaimer]]
  *
- * and in part from AU1x00 OHCI HCD driver "u-boot/cpu/mips/au1x00_usb_ohci.c"
+ * and in part from AU1x00 OHCI HCD driver "u-boot/arch/mips/cpu/au1x00_usb_ohci.c"
  * (original copyright message follows):
  *
  *    URB OHCI HCD (Host Controller Driver) for USB on the AU1x00.
  *
  *    (C) Copyright 2003
- *    Gary Jennejohn, DENX Software Engineering <gj@denx.de>
+ *    Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
  *
  *    [[GNU/GPL disclaimer]]
  *
@@ -578,7 +578,7 @@ static int isp116x_interrupt(struct isp116x *isp116x)
                        /* When root hub or any of its ports is going
                           to come out of suspend, it may take more
                           than 10ms for status bits to stabilize. */
-                       wait_ms(20);
+                       mdelay(20);
                }
 
                if (intstat & HCINT_SO) {
@@ -679,7 +679,7 @@ retry_same:
        /* Pack data into FIFO ram */
        pack_fifo(isp116x, dev, pipe, ptd, 1, buffer, len);
 #ifdef EXTRA_DELAY
-       wait_ms(EXTRA_DELAY);
+       mdelay(EXTRA_DELAY);
 #endif
 
        /* Start the data transfer */
@@ -983,11 +983,11 @@ static int isp116x_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
                                                       HCRHPORT1 + wIndex - 1);
                                if (!(tmp & RH_PS_PRS))
                                        break;
-                               wait_ms(1);
+                               mdelay(1);
                        }
                        isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
                                            RH_PS_PRS);
-                       wait_ms(10);
+                       mdelay(10);
 
                        len = 0;
                        break;
@@ -1251,7 +1251,7 @@ static int isp116x_sw_reset(struct isp116x *isp116x)
        isp116x_write_reg32(isp116x, HCCMDSTAT, HCCMDSTAT_HCR);
        while (--retries) {
                /* It usually resets within 1 ms */
-               wait_ms(1);
+               mdelay(1);
                if (!(isp116x_read_reg32(isp116x, HCCMDSTAT) & HCCMDSTAT_HCR))
                        break;
        }
@@ -1278,7 +1278,7 @@ static int isp116x_reset(struct isp116x *isp116x)
                clkrdy = isp116x_read_reg16(isp116x, HCuPINT) & HCuPINT_CLKRDY;
                if (clkrdy)
                        break;
-               wait_ms(1);
+               mdelay(1);
        }
        if (!clkrdy) {
                ERR("clock not ready after %dms", timeout);