]> git.sur5r.net Git - u-boot/blobdiff - drivers/usb/host/ohci-lpc32xx.c
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
[u-boot] / drivers / usb / host / ohci-lpc32xx.c
index 48d338e9fa0f7201b0aaa0229c50171b6608855f..2f2b4b90def72b4407d6a3a1fea238d6802a6431 100644 (file)
@@ -9,10 +9,13 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <errno.h>
+#include <wait_bit.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/clk.h>
+#include <asm/arch/i2c.h>
 #include <usb.h>
 #include <i2c.h>
 
@@ -80,38 +83,20 @@ struct otg_regs {
 static struct otg_regs *otg = (struct otg_regs *)USB_BASE;
 static struct clk_pm_regs *clk_pwr = (struct clk_pm_regs *)CLK_PM_BASE;
 
-static int wait_for_bit(void *reg, const u32 mask, bool set)
-{
-       u32 val;
-       unsigned long start = get_timer(0);
-
-       while (1) {
-               val = readl(reg);
-               if (!set)
-                       val = ~val;
-
-               if ((val & mask) == mask)
-                       return 0;
-
-               if (get_timer(start) > CONFIG_SYS_HZ)
-                       break;
-
-               udelay(1);
-       }
-
-       error("Timeout (reg=%p mask=%08x wait_set=%i)\n", reg, mask, set);
-
-       return -ETIMEDOUT;
-}
-
-static int isp1301_set_value(int reg, u8 value)
+static int isp1301_set_value(struct udevice *dev, int reg, u8 value)
 {
+#ifndef CONFIG_DM_I2C
        return i2c_write(ISP1301_I2C_ADDR, reg, 1, &value, 1);
+#else
+       return dm_i2c_write(dev, reg, &value, 1);
+#endif
 }
 
-static void isp1301_configure(void)
+static void isp1301_configure(struct udevice *dev)
 {
+#ifndef CONFIG_DM_I2C
        i2c_set_bus_num(I2C_2);
+#endif
 
        /*
         * LPC32XX only supports DAT_SE0 USB mode
@@ -119,23 +104,23 @@ static void isp1301_configure(void)
         */
 
        /* Disable transparent UART mode first */
-       isp1301_set_value(ISP1301_I2C_MODE_CONTROL_1_CLR, MC1_UART_EN);
+       isp1301_set_value(dev, ISP1301_I2C_MODE_CONTROL_1_CLR, MC1_UART_EN);
 
-       isp1301_set_value(ISP1301_I2C_MODE_CONTROL_1_CLR, ~MC1_SPEED_REG);
-       isp1301_set_value(ISP1301_I2C_MODE_CONTROL_1_SET, MC1_SPEED_REG);
-       isp1301_set_value(ISP1301_I2C_MODE_CONTROL_2_CLR, ~0);
-       isp1301_set_value(ISP1301_I2C_MODE_CONTROL_2_SET,
+       isp1301_set_value(dev, ISP1301_I2C_MODE_CONTROL_1_CLR, ~MC1_SPEED_REG);
+       isp1301_set_value(dev, ISP1301_I2C_MODE_CONTROL_1_SET, MC1_SPEED_REG);
+       isp1301_set_value(dev, ISP1301_I2C_MODE_CONTROL_2_CLR, ~0);
+       isp1301_set_value(dev, ISP1301_I2C_MODE_CONTROL_2_SET,
                          MC2_BI_DI | MC2_PSW_EN | MC2_SPD_SUSP_CTRL);
 
-       isp1301_set_value(ISP1301_I2C_OTG_CONTROL_1_CLR, ~0);
-       isp1301_set_value(ISP1301_I2C_MODE_CONTROL_1_SET, MC1_DAT_SE0);
-       isp1301_set_value(ISP1301_I2C_OTG_CONTROL_1_SET,
+       isp1301_set_value(dev, ISP1301_I2C_OTG_CONTROL_1_CLR, ~0);
+       isp1301_set_value(dev, ISP1301_I2C_MODE_CONTROL_1_SET, MC1_DAT_SE0);
+       isp1301_set_value(dev, ISP1301_I2C_OTG_CONTROL_1_SET,
                          OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN);
-       isp1301_set_value(ISP1301_I2C_OTG_CONTROL_1_CLR,
+       isp1301_set_value(dev, ISP1301_I2C_OTG_CONTROL_1_CLR,
                          OTG1_DM_PULLUP | OTG1_DP_PULLUP);
-       isp1301_set_value(ISP1301_I2C_INTERRUPT_LATCH_CLR, ~0);
-       isp1301_set_value(ISP1301_I2C_INTERRUPT_FALLING_CLR, ~0);
-       isp1301_set_value(ISP1301_I2C_INTERRUPT_RISING_CLR, ~0);
+       isp1301_set_value(dev, ISP1301_I2C_INTERRUPT_LATCH_CLR, ~0);
+       isp1301_set_value(dev, ISP1301_I2C_INTERRUPT_FALLING_CLR, ~0);
+       isp1301_set_value(dev, ISP1301_I2C_INTERRUPT_RISING_CLR, ~0);
 
        /* Enable usb_need_clk clock after transceiver is initialized */
        setbits_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_USBDVND_EN);
@@ -158,7 +143,8 @@ static int usbpll_setup(void)
        setbits_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_POSTDIV_2POW(0x01));
        setbits_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_PLL_PWRUP);
 
-       ret = wait_for_bit(&clk_pwr->usb_ctrl, CLK_USBCTRL_PLL_STS, 1);
+       ret = wait_for_bit(__func__, &clk_pwr->usb_ctrl, CLK_USBCTRL_PLL_STS,
+                          true, CONFIG_SYS_HZ, false);
        if (ret)
                return ret;
 
@@ -171,6 +157,15 @@ static int usbpll_setup(void)
 int usb_cpu_init(void)
 {
        u32 ret;
+       struct udevice *dev = NULL;
+
+#ifdef CONFIG_DM_I2C
+       ret = i2c_get_chip_for_busnum(I2C_2, ISP1301_I2C_ADDR, 1, &dev);
+       if (ret) {
+               debug("%s: No bus %d\n", __func__, I2C_2);
+               return ret;
+       }
+#endif
 
        /*
         * USB pins routing setup is done by "lpc32xx_usb_init()" and should
@@ -183,12 +178,13 @@ int usb_cpu_init(void)
 
        /* enable I2C clock */
        writel(OTG_CLK_I2C_EN, &otg->otg_clk_ctrl);
-       ret = wait_for_bit(&otg->otg_clk_sts, OTG_CLK_I2C_EN, 1);
+       ret = wait_for_bit(__func__, &otg->otg_clk_sts, OTG_CLK_I2C_EN, true,
+                          CONFIG_SYS_HZ, false);
        if (ret)
                return ret;
 
        /* Configure ISP1301 */
-       isp1301_configure();
+       isp1301_configure(dev);
 
        /* setup USB clocks and PLL */
        ret = usbpll_setup();
@@ -203,26 +199,38 @@ int usb_cpu_init(void)
                         OTG_CLK_I2C_EN | OTG_CLK_HOST_EN;
        writel(mask, &otg->otg_clk_ctrl);
 
-       ret = wait_for_bit(&otg->otg_clk_sts, mask, 1);
+       ret = wait_for_bit(__func__, &otg->otg_clk_sts, mask, true,
+                          CONFIG_SYS_HZ, false);
        if (ret)
                return ret;
 
        setbits_le32(&otg->otg_sts_ctrl, OTG_HOST_EN);
-       isp1301_set_value(ISP1301_I2C_OTG_CONTROL_1_SET, OTG1_VBUS_DRV);
+       isp1301_set_value(dev, ISP1301_I2C_OTG_CONTROL_1_SET, OTG1_VBUS_DRV);
 
        return 0;
 }
 
 int usb_cpu_stop(void)
 {
+       struct udevice *dev = NULL;
+       int ret = 0;
+
+#ifdef CONFIG_DM_I2C
+       ret = i2c_get_chip_for_busnum(I2C_2, ISP1301_I2C_ADDR, 1, &dev);
+       if (ret) {
+               debug("%s: No bus %d\n", __func__, I2C_2);
+               return ret;
+       }
+#endif
+
        /* vbus off */
-       isp1301_set_value(ISP1301_I2C_OTG_CONTROL_1_SET, OTG1_VBUS_DRV);
+       isp1301_set_value(dev, ISP1301_I2C_OTG_CONTROL_1_SET, OTG1_VBUS_DRV);
 
        clrbits_le32(&otg->otg_sts_ctrl, OTG_HOST_EN);
 
        clrbits_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_HCLK_EN);
 
-       return 0;
+       return ret;
 }
 
 int usb_cpu_init_fail(void)