]> git.sur5r.net Git - u-boot/blobdiff - drivers/usb/host/xhci-mem.c
SPDX: Convert all of our single license tags to Linux Kernel style
[u-boot] / drivers / usb / host / xhci-mem.c
index d5eab3a61545442ae31066e85b4584946bbdf54d..da5dbd94edd074891419dc5fd9f5b87d4c03fc4d 100644 (file)
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * USB HOST XHCI Controller stack
  *
@@ -10,8 +11,6 @@
  * Copyright (C) 2013 Samsung Electronics Co.Ltd
  * Authors: Vivek Gautam <gautam.vivek@samsung.com>
  *         Vikas Sajjan <vikas.sajjan@samsung.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -786,12 +785,22 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl,
 #ifdef CONFIG_DM_USB
        /* Set up TT fields to support FS/LS devices */
        if (speed == USB_SPEED_LOW || speed == USB_SPEED_FULL) {
-               dev = dev_get_parent_priv(udev->dev);
-               if (dev->speed == USB_SPEED_HIGH) {
-                       hub = dev_get_uclass_priv(udev->dev);
+               struct udevice *parent = udev->dev;
+
+               dev = udev;
+               do {
+                       port_num = dev->portnr;
+                       dev = dev_get_parent_priv(parent);
+                       if (usb_hub_is_root_hub(dev->dev))
+                               break;
+                       parent = dev->dev->parent;
+               } while (dev->speed != USB_SPEED_HIGH);
+
+               if (!usb_hub_is_root_hub(dev->dev)) {
+                       hub = dev_get_uclass_priv(dev->dev);
                        if (hub->tt.multi)
                                slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
-                       slot_ctx->tt_info |= cpu_to_le32(TT_PORT(udev->portnr));
+                       slot_ctx->tt_info |= cpu_to_le32(TT_PORT(port_num));
                        slot_ctx->tt_info |= cpu_to_le32(TT_SLOT(dev->slot_id));
                }
        }
@@ -840,6 +849,12 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl,
        trb_64 = (uintptr_t)virt_dev->eps[0].ring->first_seg->trbs;
        ep0_ctx->deq = cpu_to_le64(trb_64 | virt_dev->eps[0].ring->cycle_state);
 
+       /*
+        * xHCI spec 6.2.3:
+        * software shall set 'Average TRB Length' to 8 for control endpoints.
+        */
+       ep0_ctx->tx_info = cpu_to_le32(EP_AVG_TRB_LENGTH(8));
+
        /* Steps 7 and 8 were done in xhci_alloc_virt_device() */
 
        xhci_flush_cache((uintptr_t)ep0_ctx, sizeof(struct xhci_ep_ctx));