+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2016 Rockchip, Inc.
* Authors: Daniel Meng <daniel.meng@rock-chips.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <dm.h>
-#include <fdtdec.h>
-#include <libfdt.h>
#include <malloc.h>
#include <usb.h>
#include <watchdog.h>
#include "xhci.h"
-DECLARE_GLOBAL_DATA_PTR;
-
struct rockchip_xhci_platdata {
fdt_addr_t hcd_base;
fdt_addr_t phy_base;
/*
* Get the base address for XHCI controller from the device node
*/
- plat->hcd_base = devfdt_get_addr(dev);
+ plat->hcd_base = dev_read_addr(dev);
if (plat->hcd_base == FDT_ADDR_T_NONE) {
- error("Can't get the XHCI register base address\n");
+ pr_err("Can't get the XHCI register base address\n");
return -ENXIO;
}
}
if (plat->phy_base == FDT_ADDR_T_NONE) {
- error("Can't get the usbphy register address\n");
+ pr_err("Can't get the usbphy register address\n");
return -ENXIO;
}
ret = dwc3_core_init(rkxhci->dwc3_reg);
if (ret) {
- error("failed to initialize core\n");
+ pr_err("failed to initialize core\n");
return ret;
}
if (plat->vbus_supply) {
ret = regulator_set_enable(plat->vbus_supply, true);
if (ret) {
- error("XHCI: failed to set VBus supply\n");
+ pr_err("XHCI: failed to set VBus supply\n");
return ret;
}
}
ret = rockchip_xhci_core_init(ctx, dev);
if (ret) {
- error("XHCI: failed to initialize controller\n");
+ pr_err("XHCI: failed to initialize controller\n");
return ret;
}
if (plat->vbus_supply) {
ret = regulator_set_enable(plat->vbus_supply, false);
if (ret)
- error("XHCI: failed to set VBus supply\n");
+ pr_err("XHCI: failed to set VBus supply\n");
}
return ret;