usb: xhci: zynqmp: Add support for DM_USB

[u-boot] / drivers / usb / host / xhci-zynqmp.c

diff --git a/drivers/usb/host/xhci-zynqmp.c b/drivers/usb/host/xhci-zynqmp.c
index a7353698d7a47870565f4458329f287966ede131..a8829d9baaf6e7d984fc110e219adcd58c1e9da4 100644 (file)
--- a/drivers/usb/host/xhci-zynqmp.c
+++ b/drivers/usb/host/xhci-zynqmp.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2015 Xilinx, Inc.
  *
@@ -6,21 +7,18 @@
  * Author: Siva Durga Prasad Paladugu<sivadur@xilinx.com>
  *
  * This file was reused from Freescale USB xHCI
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
+#include <dm.h>
 #include <usb.h>
-#include <asm-generic/errno.h>
+#include <linux/errno.h>
 #include <asm/arch-zynqmp/hardware.h>
 #include <linux/compat.h>
 #include <linux/usb/dwc3.h>
 #include "xhci.h"
 
 /* Declare global data pointer */
-DECLARE_GLOBAL_DATA_PTR;
-
 /* Default to the ZYNQMP XHCI defines */
 #define USB3_PWRCTL_CLK_CMD_MASK       0x3FE000
 #define USB3_PWRCTL_CLK_FREQ_MASK      0xFFC
@@ -57,13 +55,23 @@ DECLARE_GLOBAL_DATA_PTR;
 #define USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN    BIT(17)
 
 struct zynqmp_xhci {
+#ifdef CONFIG_DM_USB
+       struct usb_platdata usb_plat;
+#endif
+       struct xhci_ctrl ctrl;
        struct xhci_hccr *hcd;
        struct dwc3 *dwc3_reg;
 };
 
+#ifdef CONFIG_DM_USB
+struct zynqmp_xhci_platdata {
+       fdt_addr_t hcd_base;
+};
+#else
 static struct zynqmp_xhci zynqmp_xhci;
 
 unsigned long ctr_addr[] = CONFIG_ZYNQMP_XHCI_LIST;
+#endif
 
 static int zynqmp_xhci_core_init(struct zynqmp_xhci *zynqmp_xhci)
 {
@@ -81,6 +89,7 @@ static int zynqmp_xhci_core_init(struct zynqmp_xhci *zynqmp_xhci)
        return ret;
 }
 
+#ifndef CONFIG_DM_USB
 int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor)
 {
        struct zynqmp_xhci *ctx = &zynqmp_xhci;
@@ -114,6 +123,7 @@ int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor)
 
        return ret;
 }
+#endif
 
 void xhci_hcd_stop(int index)
 {
@@ -124,3 +134,59 @@ void xhci_hcd_stop(int index)
 
        return;
 }
+
+#ifdef CONFIG_DM_USB
+static int xhci_usb_probe(struct udevice *dev)
+{
+       struct zynqmp_xhci_platdata *plat = dev_get_platdata(dev);
+       struct zynqmp_xhci *ctx = dev_get_priv(dev);
+       struct xhci_hcor *hcor;
+       int ret;
+
+       ctx->hcd = (struct xhci_hccr *)plat->hcd_base;
+       ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET);
+
+       ret = zynqmp_xhci_core_init(ctx);
+       if (ret) {
+               puts("XHCI: failed to initialize controller\n");
+               return -EINVAL;
+       }
+
+       hcor = (struct xhci_hcor *)((ulong)ctx->hcd +
+                                 HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase)));
+
+       return xhci_register(dev, ctx->hcd, hcor);
+}
+
+static int xhci_usb_remove(struct udevice *dev)
+{
+       return xhci_deregister(dev);
+}
+
+static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
+{
+       struct zynqmp_xhci_platdata *plat = dev_get_platdata(dev);
+       const void *blob = gd->fdt_blob;
+
+       /* Get the base address for XHCI controller from the device node */
+       plat->hcd_base = fdtdec_get_addr(blob, dev_of_offset(dev), "reg");
+       if (plat->hcd_base == FDT_ADDR_T_NONE) {
+               debug("Can't get the XHCI register base address\n");
+               return -ENXIO;
+       }
+
+       return 0;
+}
+
+U_BOOT_DRIVER(dwc3_generic_host) = {
+       .name = "dwc3-generic-host",
+       .id = UCLASS_USB,
+       .ofdata_to_platdata = xhci_usb_ofdata_to_platdata,
+       .probe = xhci_usb_probe,
+       .remove = xhci_usb_remove,
+       .ops = &xhci_usb_ops,
+       .platdata_auto_alloc_size = sizeof(struct zynqmp_xhci_platdata),
+       .priv_auto_alloc_size = sizeof(struct zynqmp_xhci),
+       .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
+#endif