+// SPDX-License-Identifier: GPL-2.0
/*
* Allwinner SUNXI "glue layer"
*
* Copyright (C) 2005-2006 by Texas Instruments
*
* This file is part of the Inventra Controller Driver for Linux.
- *
- * The Inventra Controller Driver for Linux is free software; you
- * can redistribute it and/or modify it under the terms of the GNU
- * General Public License version 2 as published by the Free Software
- * Foundation.
- *
*/
#include <common.h>
+#include <dm.h>
#include <asm/arch/cpu.h>
#include <asm/arch/clock.h>
#include <asm/arch/gpio.h>
#include <asm/arch/usb_phy.h>
#include <asm-generic/gpio.h>
+#include <dm/lists.h>
+#include <dm/root.h>
+#include <linux/usb/musb.h>
#include "linux-compat.h"
#include "musb_core.h"
-#ifdef CONFIG_AXP152_POWER
-#include <axp152.h>
-#endif
-#ifdef CONFIG_AXP209_POWER
-#include <axp209.h>
-#endif
-#ifdef CONFIG_AXP221_POWER
-#include <axp221.h>
-#endif
+#include "musb_uboot.h"
/******************************************************************************
******************************************************************************
* From usbc/usbc.c
******************************************************************************/
+struct sunxi_glue {
+ struct musb_host_data mdata;
+ struct sunxi_ccm_reg *ccm;
+ struct device dev;
+};
+#define to_sunxi_glue(d) container_of(d, struct sunxi_glue, dev)
+
static u32 USBC_WakeUp_ClearChangeDetect(u32 reg_val)
{
u32 temp = reg_val;
musb_writel(base, USBC_REG_o_ISCR, reg_val);
}
-static void USBC_DisableIdPullUp(__iomem void *base)
-{
- u32 reg_val;
-
- reg_val = musb_readl(base, USBC_REG_o_ISCR);
- reg_val &= ~(1 << USBC_BP_ISCR_ID_PULLUP_EN);
- reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
- musb_writel(base, USBC_REG_o_ISCR, reg_val);
-}
-
static void USBC_EnableDpDmPullUp(__iomem void *base)
{
u32 reg_val;
musb_writel(base, USBC_REG_o_ISCR, reg_val);
}
-static void USBC_DisableDpDmPullUp(__iomem void *base)
+static void USBC_ForceIdToLow(__iomem void *base)
{
u32 reg_val;
reg_val = musb_readl(base, USBC_REG_o_ISCR);
- reg_val &= ~(1 << USBC_BP_ISCR_DPDM_PULLUP_EN);
+ reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID);
+ reg_val |= (0x02 << USBC_BP_ISCR_FORCE_ID);
reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
musb_writel(base, USBC_REG_o_ISCR, reg_val);
}
-static void USBC_ForceIdToLow(__iomem void *base)
+static void USBC_ForceIdToHigh(__iomem void *base)
{
u32 reg_val;
reg_val = musb_readl(base, USBC_REG_o_ISCR);
reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID);
- reg_val |= (0x02 << USBC_BP_ISCR_FORCE_ID);
+ reg_val |= (0x03 << USBC_BP_ISCR_FORCE_ID);
reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
musb_writel(base, USBC_REG_o_ISCR, reg_val);
}
-static void USBC_ForceIdToHigh(__iomem void *base)
+static void USBC_ForceVbusValidToLow(__iomem void *base)
{
u32 reg_val;
reg_val = musb_readl(base, USBC_REG_o_ISCR);
- reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID);
- reg_val |= (0x03 << USBC_BP_ISCR_FORCE_ID);
+ reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
+ reg_val |= (0x02 << USBC_BP_ISCR_FORCE_VBUS_VALID);
reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
musb_writel(base, USBC_REG_o_ISCR, reg_val);
}
writel(reg_value, SUNXI_SRAMC_BASE + 0x04);
}
+/******************************************************************************
+ * Needed for the DFU polling magic
+ ******************************************************************************/
+
+static u8 last_int_usb;
+
+bool dfu_usb_get_reset(void)
+{
+ return !!(last_int_usb & MUSB_INTR_RESET);
+}
+
/******************************************************************************
* MUSB Glue code
******************************************************************************/
/* read and flush interrupts */
musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
+ last_int_usb = musb->int_usb;
if (musb->int_usb)
musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb);
musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
return retval;
}
-static void sunxi_musb_enable(struct musb *musb)
+/* musb_core does not call enable / disable in a balanced manner <sigh> */
+static bool enabled = false;
+
+static int sunxi_musb_enable(struct musb *musb)
{
+ int ret;
+
pr_debug("%s():\n", __func__);
+ musb_ep_select(musb->mregs, 0);
+ musb_writeb(musb->mregs, MUSB_FADDR, 0);
+
+ if (enabled)
+ return 0;
+
/* select PIO mode */
musb_writeb(musb->mregs, USBC_REG_o_VEND0, 0);
if (is_host_enabled(musb)) {
- /* port power on */
- sunxi_usb_phy_power_on(0);
+ ret = sunxi_usb_phy_vbus_detect(0);
+ if (ret == 1) {
+ printf("A charger is plugged into the OTG: ");
+ return -ENODEV;
+ }
+ ret = sunxi_usb_phy_id_detect(0);
+ if (ret == 1) {
+ printf("No host cable detected: ");
+ return -ENODEV;
+ }
+ sunxi_usb_phy_power_on(0); /* port power on */
}
+
+ USBC_ForceVbusValidToHigh(musb->mregs);
+
+ enabled = true;
+ return 0;
}
static void sunxi_musb_disable(struct musb *musb)
{
- struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-
pr_debug("%s():\n", __func__);
- /* Put the controller back in a pristane state for "usb reset" */
- if (musb->is_active) {
- sunxi_usb_phy_exit(0);
-#ifdef CONFIG_SUNXI_GEN_SUN6I
- clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
-#endif
- clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
+ if (!enabled)
+ return;
- mdelay(10);
+ if (is_host_enabled(musb))
+ sunxi_usb_phy_power_off(0); /* port power off */
- setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
-#ifdef CONFIG_SUNXI_GEN_SUN6I
- setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
-#endif
- sunxi_usb_phy_init(0);
- musb->is_active = 0;
- }
+ USBC_ForceVbusValidToLow(musb->mregs);
+ mdelay(200); /* Wait for the current session to timeout */
+
+ enabled = false;
}
static int sunxi_musb_init(struct musb *musb)
{
- struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
- int err;
+ struct sunxi_glue *glue = to_sunxi_glue(musb->controller);
pr_debug("%s():\n", __func__);
- if (is_host_enabled(musb)) {
- err = sunxi_usb_phy_vbus_detect(0);
- if (err) {
- eprintf("Error: A charger is plugged into the OTG\n");
- return -EIO;
- }
- }
-
musb->isr = sunxi_musb_interrupt;
- setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
+ setbits_le32(&glue->ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
#ifdef CONFIG_SUNXI_GEN_SUN6I
- setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
+ setbits_le32(&glue->ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
#endif
sunxi_usb_phy_init(0);
return 0;
}
-static int sunxi_musb_exit(struct musb *musb)
+static const struct musb_platform_ops sunxi_musb_ops = {
+ .init = sunxi_musb_init,
+ .enable = sunxi_musb_enable,
+ .disable = sunxi_musb_disable,
+};
+
+static struct musb_hdrc_config musb_config = {
+ .multipoint = 1,
+ .dyn_fifo = 1,
+ .num_eps = 6,
+ .ram_bits = 11,
+};
+
+static struct musb_hdrc_platform_data musb_plat = {
+#if defined(CONFIG_USB_MUSB_HOST)
+ .mode = MUSB_HOST,
+#else
+ .mode = MUSB_PERIPHERAL,
+#endif
+ .config = &musb_config,
+ .power = 250,
+ .platform_ops = &sunxi_musb_ops,
+};
+
+static int musb_usb_probe(struct udevice *dev)
+{
+ struct sunxi_glue *glue = dev_get_priv(dev);
+ struct musb_host_data *host = &glue->mdata;
+ struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
+ void *base = dev_read_addr_ptr(dev);
+ int ret;
+
+ if (!base)
+ return -EINVAL;
+
+ glue->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+ if (IS_ERR(glue->ccm))
+ return PTR_ERR(glue->ccm);
+
+ priv->desc_before_addr = true;
+
+#ifdef CONFIG_USB_MUSB_HOST
+ host->host = musb_init_controller(&musb_plat, &glue->dev, base);
+ if (!host->host)
+ return -EIO;
+
+ ret = musb_lowlevel_init(host);
+ if (!ret)
+ printf("Allwinner mUSB OTG (Host)\n");
+#else
+ ret = musb_register(&musb_plat, &glue->dev, base);
+ if (!ret)
+ printf("Allwinner mUSB OTG (Peripheral)\n");
+#endif
+
+ return ret;
+}
+
+static int musb_usb_remove(struct udevice *dev)
{
- pr_debug("%s():\n", __func__);
+ struct sunxi_glue *glue = dev_get_priv(dev);
+ struct musb_host_data *host = &glue->mdata;
+
+ musb_stop(host->host);
- USBC_DisableDpDmPullUp(musb->mregs);
- USBC_DisableIdPullUp(musb->mregs);
- sunxi_usb_phy_power_off(0);
sunxi_usb_phy_exit(0);
+#ifdef CONFIG_SUNXI_GEN_SUN6I
+ clrbits_le32(&glue->ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
+#endif
+ clrbits_le32(&glue->ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
+
+ free(host->host);
+ host->host = NULL;
return 0;
}
-const struct musb_platform_ops sunxi_musb_ops = {
- .init = sunxi_musb_init,
- .exit = sunxi_musb_exit,
+static const struct udevice_id sunxi_musb_ids[] = {
+ { .compatible = "allwinner,sun4i-a10-musb" },
+ { .compatible = "allwinner,sun6i-a31-musb" },
+ { .compatible = "allwinner,sun8i-a33-musb" },
+ { .compatible = "allwinner,sun8i-h3-musb" },
+ { }
+};
- .enable = sunxi_musb_enable,
- .disable = sunxi_musb_disable,
+U_BOOT_DRIVER(usb_musb) = {
+ .name = "sunxi-musb",
+#ifdef CONFIG_USB_MUSB_HOST
+ .id = UCLASS_USB,
+#else
+ .id = UCLASS_USB_DEV_GENERIC,
+#endif
+ .of_match = sunxi_musb_ids,
+ .probe = musb_usb_probe,
+ .remove = musb_usb_remove,
+#ifdef CONFIG_USB_MUSB_HOST
+ .ops = &musb_usb_ops,
+#endif
+ .platdata_auto_alloc_size = sizeof(struct usb_platdata),
+ .priv_auto_alloc_size = sizeof(struct sunxi_glue),
};