*
* Author: Donghwa Lee <dh09.lee@samsung.com>
*
- * SPDX-License-Identifier: GPL-2.0+
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <common.h>
#include <malloc.h>
+#include <linux/compat.h>
#include <linux/err.h>
#include <asm/arch/clk.h>
#include <asm/arch/cpu.h>
DECLARE_GLOBAL_DATA_PTR;
-static struct exynos_dp_platform_data *dp_pd;
-
void __exynos_set_dp_phy(unsigned int onoff)
{
}
return -EINVAL;
}
- /*Refer VESA Display Port Stnadard Ver1.1a Page 120 */
+ /* Refer VESA Display Port Standard Ver1.1a Page 120 */
if (edp_info->dpcd_rev == DP_DPCD_REV_11) {
temp = buf[DPCD_MAX_LANE_COUNT] & 0x1f;
if (buf[DPCD_MAX_LANE_COUNT] & 0x80)
return ret;
}
- /* Set link rate and count as you want to establish*/
+ /* Set link rate and count as you want to establish */
exynos_dp_set_link_bandwidth(edp_info->lane_bw);
exynos_dp_set_lane_count(edp_info->lane_cnt);
ret = exynos_dp_write_byte_to_dpcd(DPCD_TRAINING_PATTERN_SET,
DPCD_TRAINING_PATTERN_DISABLED);
if (ret != EXYNOS_DP_SUCCESS) {
- printf("DP requst_link_traninig_req failed\n");
+ printf("DP request_link_training_req failed\n");
return -EAGAIN;
}
unsigned int dpcd_addr;
unsigned char shift_val[DP_LANE_CNT_4] = {0, 4, 0, 4};
- /*lane_num value is used as arry index, so this range 0 ~ 3 */
+ /* lane_num value is used as array index, so this range 0 ~ 3 */
dpcd_addr = DPCD_ADJUST_REQUEST_LANE0_1 + (lane_num / 2);
ret = exynos_dp_read_byte_from_dpcd(dpcd_addr, &buf);
ret = exynos_dp_training_pattern_dis();
if (ret != EXYNOS_DP_SUCCESS) {
- printf("DP training_patter_disable() failed\n");
+ printf("DP training_pattern_disable() failed\n");
edp_info->lt_info.lt_status = DP_LT_FAIL;
}
ret = exynos_dp_write_bytes_to_dpcd(
DPCD_TRAINING_PATTERN_SET, 5, buf);
if (ret != EXYNOS_DP_SUCCESS) {
- printf("DP write traning pattern1 failed\n");
+ printf("DP write training pattern1 failed\n");
edp_info->lt_info.lt_status = DP_LT_FAIL;
return ret;
} else
ret = exynos_dp_write_bytes_to_dpcd(
DPCD_TRAINING_LANE0_SET, 4, lt_ctl_val);
if (ret != EXYNOS_DP_SUCCESS) {
- printf("DP write traning pattern2 failed\n");
+ printf("DP write training pattern2 failed\n");
edp_info->lt_info.lt_status = DP_LT_FAIL;
return ret;
}
ret = exynos_dp_sw_link_training(edp_info);
if (ret != EXYNOS_DP_SUCCESS)
- printf("DP dp_sw_link_traning() failed\n");
+ printf("DP dp_sw_link_training() failed\n");
return ret;
}
return ret;
}
-#ifdef CONFIG_OF_CONTROL
int exynos_dp_parse_dt(const void *blob, struct edp_device_info *edp_info)
{
unsigned int node = fdtdec_next_compatible(blob, 0,
"samsung,color-depth", 0);
return 0;
}
-#endif
unsigned int exynos_init_dp(void)
{
return -EFAULT;
}
-#ifdef CONFIG_OF_CONTROL
if (exynos_dp_parse_dt(gd->fdt_blob, edp_info))
debug("unable to parse DP DT node\n");
-#else
- edp_info = dp_pd->edp_dev_info;
- if (edp_info == NULL) {
- debug("failed to get edp_info data.\n");
- return -EFAULT;
- }
-#endif
exynos_dp_set_base_addr();
return ret;
}
- printf("Exynos DP init done\n");
+ debug("Exynos DP init done\n");
return ret;
}
-
-void exynos_set_dp_platform_data(struct exynos_dp_platform_data *pd)
-{
- if (pd == NULL) {
- debug("pd is NULL\n");
- return;
- }
-
- dp_pd = pd;
-}