]> git.sur5r.net Git - u-boot/blobdiff - drivers/video/ipu_common.c
dm: core: Update of_read_fmap_entry() for livetree
[u-boot] / drivers / video / ipu_common.c
index 5676a0f083b6b33ada21910348c0f3dc8c79d56c..cbe1984e4f7579a3c20fb054b78a449a2dd2a85f 100644 (file)
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Porting to u-boot:
  *
@@ -7,8 +8,6 @@
  * Linux IPU driver for MX51:
  *
  * (C) Copyright 2005-2010 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /* #define DEBUG */
 #include <linux/types.h>
 #include <linux/err.h>
 #include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/crm_regs.h>
+#include <asm/arch/sys_proto.h>
 #include <div64.h>
 #include "ipu.h"
 #include "ipu_regs.h"
@@ -81,6 +81,11 @@ struct ipu_ch_param {
 
 #define IPU_SW_RST_TOUT_USEC   (10000)
 
+#define IPUV3_CLK_MX51         133000000
+#define IPUV3_CLK_MX53         200000000
+#define IPUV3_CLK_MX6Q         264000000
+#define IPUV3_CLK_MX6DL                198000000
+
 void clk_enable(struct clk *clk)
 {
        if (clk) {
@@ -126,8 +131,12 @@ struct clk *clk_get_parent(struct clk *clk)
 
 int clk_set_rate(struct clk *clk, unsigned long rate)
 {
-       if (clk && clk->set_rate)
+       if (!clk)
+               return 0;
+
+       if (clk->set_rate)
                clk->set_rate(clk, rate);
+
        return clk->rate;
 }
 
@@ -196,7 +205,6 @@ static void clk_ipu_disable(struct clk *clk)
 
 static struct clk ipu_clk = {
        .name = "ipu_clk",
-       .rate = CONFIG_IPUV3_CLK,
 #if defined(CONFIG_MX51) || defined(CONFIG_MX53)
        .enable_reg = (u32 *)(CCM_BASE_ADDR +
                offsetof(struct mxc_ccm_reg, CCGR5)),
@@ -476,6 +484,13 @@ int ipu_probe(void)
        g_pixel_clk[1] = &pixel_clk[1];
 
        g_ipu_clk = &ipu_clk;
+#if defined(CONFIG_MX51)
+       g_ipu_clk->rate = IPUV3_CLK_MX51;
+#elif defined(CONFIG_MX53)
+       g_ipu_clk->rate = IPUV3_CLK_MX53;
+#else
+       g_ipu_clk->rate = is_mx6sdl() ? IPUV3_CLK_MX6DL : IPUV3_CLK_MX6Q;
+#endif
        debug("ipu_clk = %u\n", clk_get_rate(g_ipu_clk));
        g_ldb_clk = &ldb_clk;
        debug("ldb_clk = %u\n", clk_get_rate(g_ldb_clk));
@@ -1243,3 +1258,8 @@ int ipu_set_ldb_clock(int rate)
 
        return 0;
 }
+
+bool ipu_clk_enabled(void)
+{
+       return g_ipu_clk_enabled;
+}